On Sat, Mar 08, 2025 at 11:05:36AM +0100, Eric wrote: > > $ sudo lspci -nns 0000:00:11.0 > 00:11.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD/ATI] > SB7x0/SB8x0/SB9x0 SATA Controller [AHCI mode] [1002:4391] (rev 40) Ok, so some old ATI controller that seems to have a bunch of workarounds. Mario, do you know anything about this AHCI controller? """ 3.1.4 Offset 0Ch: PI – Ports Implemented This register indicates which ports are exposed by the HBA. It is loaded by the BIOS. It indicates which ports that the HBA supports are available for software to use. For example, on an HBA that supports 6 ports as indicated in CAP.NP, only ports 1 and 3 could be available, with ports 0, 2, 4, and 5 being unavailable. Software must not read or write to registers within unavailable ports. The intent of this register is to allow system vendors to build platforms that support less than the full number of ports implemented on the HBA silicon. """ It seems quite clear that it is a BIOS bug. It is understandable that HBA vendors reuse the same silicon, but I would expect BIOS to always write the same value to the PI register. Kind regards, Niklas
