[ Sasha's backport helper bot ]
Hi,
✅ All tests passed successfully. No issues detected.
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The upstream commit SHA1 provided is correct: f24f669d03f884a6ef95cca84317d0f329e93961
WARNING: Author mismatch between patch and upstream commit:
Backport author: Pawan Gupta<pawan.kumar.gupta@xxxxxxxxxxxxxxx>
Commit author: Xi Ruoyao<xry111@xxxxxxxxxxx>
Status in newer kernel trees:
6.13.y | Present (exact SHA1)
6.12.y | Not found
6.6.y | Not found
6.1.y | Not found
Note: The patch differs from the upstream commit:
---
1: f24f669d03f88 ! 1: 1bbb6075a546b x86/mm: Don't disable PCID when INVLPG has been fixed by microcode
@@ Metadata
## Commit message ##
x86/mm: Don't disable PCID when INVLPG has been fixed by microcode
+ commit f24f669d03f884a6ef95cca84317d0f329e93961 upstream.
+
Per the "Processor Specification Update" documentations referred by
the intel-microcode-20240312 release note, this microcode release has
fixed the issue for all affected models.
@@ Commit message
Intel.
[ dhansen: comment and changelog tweaks ]
+ [ pawan: backported to 5.4
+ s/ATOM_GRACEMONT/ALDERLAKE_N/
+ added microcode matching to INTEL_MATCH() and invlpg_miss_ids ]
Signed-off-by: Xi Ruoyao <xry111@xxxxxxxxxxx>
Signed-off-by: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>
Acked-by: Pawan Gupta <pawan.kumar.gupta@xxxxxxxxxxxxxxx>
+ Signed-off-by: Pawan Gupta <pawan.kumar.gupta@xxxxxxxxxxxxxxx>
Link: https://lore.kernel.org/all/168436059559.404.13934972543631851306.tip-bot2@tip-bot2/
Link: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20240312
Link: https://cdrdv2.intel.com/v1/dl/getContent/740518 # RPL042, rev. 13
@@ Commit message
## arch/x86/mm/init.c ##
@@ arch/x86/mm/init.c: static void __init probe_page_size_mask(void)
+ }
}
+-#define INTEL_MATCH(_model) { .vendor = X86_VENDOR_INTEL, \
+- .family = 6, \
+- .model = _model, \
+- }
++#define INTEL_MATCH(_model, ucode) { .vendor = X86_VENDOR_INTEL, \
++ .family = 6, \
++ .model = _model, \
++ .driver_data = ucode, \
++ }
/*
- * INVLPG may not properly flush Global entries
- * on these CPUs when PCIDs are enabled.
@@ arch/x86/mm/init.c: static void __init probe_page_size_mask(void)
+ * these CPUs. New microcode fixes the issue.
*/
static const struct x86_cpu_id invlpg_miss_ids[] = {
-- X86_MATCH_VFM(INTEL_ALDERLAKE, 0),
-- X86_MATCH_VFM(INTEL_ALDERLAKE_L, 0),
-- X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, 0),
-- X86_MATCH_VFM(INTEL_RAPTORLAKE, 0),
-- X86_MATCH_VFM(INTEL_RAPTORLAKE_P, 0),
-- X86_MATCH_VFM(INTEL_RAPTORLAKE_S, 0),
-+ X86_MATCH_VFM(INTEL_ALDERLAKE, 0x2e),
-+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, 0x42c),
-+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, 0x11),
-+ X86_MATCH_VFM(INTEL_RAPTORLAKE, 0x118),
-+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P, 0x4117),
-+ X86_MATCH_VFM(INTEL_RAPTORLAKE_S, 0x2e),
+- INTEL_MATCH(INTEL_FAM6_ALDERLAKE ),
+- INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ),
+- INTEL_MATCH(INTEL_FAM6_ALDERLAKE_N ),
+- INTEL_MATCH(INTEL_FAM6_RAPTORLAKE ),
+- INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P),
+- INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S),
++ INTEL_MATCH(INTEL_FAM6_ALDERLAKE, 0x2e),
++ INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L, 0x42c),
++ INTEL_MATCH(INTEL_FAM6_ALDERLAKE_N, 0x11),
++ INTEL_MATCH(INTEL_FAM6_RAPTORLAKE, 0x118),
++ INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P, 0x4117),
++ INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S, 0x2e),
{}
};
---
Results of testing on various branches:
| Branch | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-5.4.y | Success | Success |
