On Tue, 2025-02-18 at 23:18 +0200, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > We currently call intel_set_cdclk_post_plane_update() far > too early. When pipes are active during the reprogramming > the current spot only works for the cd2x divider update > case, as that is synchronize to the pipe's vblank. Squashing > and crawling are not synchronized in any way, so doing the > programming while the pipes/planes are potentially still using > the old hardware state could lead to underruns. > > Move the post plane reprgramming to a spot where we know > that the pipes/planes have switched over the new hardware > state. > > Cc: stable@xxxxxxxxxxxxxxx > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_display.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) Reviewed-by: Vinod Govindapillai <vinod.govindapillai@xxxxxxxxx> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 065fdf6dbb88..cb9c6ad3aa11 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -7527,9 +7527,6 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) > > intel_program_dpkgc_latency(state); > > - if (state->modeset) > - intel_set_cdclk_post_plane_update(state); > - > intel_wait_for_vblank_workers(state); > > /* FIXME: We should call drm_atomic_helper_commit_hw_done() here > @@ -7606,6 +7603,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) > intel_verify_planes(state); > > intel_sagv_post_plane_update(state); > + if (state->modeset) > + intel_set_cdclk_post_plane_update(state); > intel_pmdemand_post_plane_update(state); > > drm_atomic_helper_commit_hw_done(&state->base);
