Hi Greg,
On 2025-02-11 11:29, Greg Kroah-Hartman wrote:
> On Sun, Feb 09, 2025 at 02:28:34PM +0100, Aurelien Jarno wrote:
> > On 2024-12-30 16:42, Greg Kroah-Hartman wrote:
> > > 6.12-stable review patch. If anyone has any objections, please let me know.
> >
> > It probably comes a bit late, but this patch broke usb and pcie on
> > rk356x. The other commit from the same series, commit 8b9c12757f91
> > ("arm64: dts: rockchip: add reset-names for combphy on rk3568"), also
> > needs to be backported.
>
> That commit does not apply, can you please provide a working backport
> for us to queue up?
That sounds strange, it applies fine against v6.12.13 here, and I do not
see any changes to the two files it modifies in queue-6.12.
Anyway please find a backport attached, i can also send it directly to
the list if you prefer.
Thanks
Aurelien
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@xxxxxxxxxxx http://aurel32.net
From e04594d6a86171593ede97987c9f99bfe51a74de Mon Sep 17 00:00:00 2001
From: Chukun Pan <amadeus@xxxxxxxxxx>
Date: Fri, 22 Nov 2024 15:30:05 +0800
Subject: [PATCH] arm64: dts: rockchip: add reset-names for combphy on rk3568
commit 8b9c12757f919157752646faf3821abf2b7d2a64 upstream.
The reset-names of combphy are missing, add it.
Signed-off-by: Chukun Pan <amadeus@xxxxxxxxxx>
Fixes: fd3ac6e80497 ("dt-bindings: phy: rockchip: rk3588 has two reset lines")
Link: https://lore.kernel.org/r/20241122073006.99309-1-amadeus@xxxxxxxxxx
Signed-off-by: Heiko Stuebner <heiko@xxxxxxxxx>
Signed-off-by: Aurelien Jarno <aurelien@xxxxxxxxxxx>
---
arch/arm64/boot/dts/rockchip/rk3568.dtsi | 1 +
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 0946310e8c124..6fd67ae271174 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -262,6 +262,7 @@ combphy0: phy@fe820000 {
assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
assigned-clock-rates = <100000000>;
resets = <&cru SRST_PIPEPHY0>;
+ reset-names = "phy";
rockchip,pipe-grf = <&pipegrf>;
rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
#phy-cells = <1>;
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 0ee0ada6f0ab0..bc0f57a26c2ff 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1762,6 +1762,7 @@ combphy1: phy@fe830000 {
assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
assigned-clock-rates = <100000000>;
resets = <&cru SRST_PIPEPHY1>;
+ reset-names = "phy";
rockchip,pipe-grf = <&pipegrf>;
rockchip,pipe-phy-grf = <&pipe_phy_grf1>;
#phy-cells = <1>;
@@ -1778,6 +1779,7 @@ combphy2: phy@fe840000 {
assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>;
assigned-clock-rates = <100000000>;
resets = <&cru SRST_PIPEPHY2>;
+ reset-names = "phy";
rockchip,pipe-grf = <&pipegrf>;
rockchip,pipe-phy-grf = <&pipe_phy_grf2>;
#phy-cells = <1>;
--
2.45.2
