Re: [PATCH 6.13 445/623] PCI/ASPM: Save parent L1SS config in pci_save_aspm_l1ss_state()

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On Wed, 5 Feb 2025, Greg Kroah-Hartman wrote:

> 6.13-stable review patch.  If anyone has any objections, please let me know.
> 
> ------------------
> 
> From: Jian-Hong Pan <jhp@xxxxxxxxxxxxx>
> 
> [ Upstream commit 1db806ec06b7c6e08e8af57088da067963ddf117 ]
> 
> After 17423360a27a ("PCI/ASPM: Save L1 PM Substates Capability for
> suspend/resume"), pci_save_aspm_l1ss_state(dev) saves the L1SS state for
> "dev", and pci_restore_aspm_l1ss_state(dev) restores the state for both
> "dev" and its parent.
> 
> The problem is that unless pci_save_state() has been used in some other
> path and has already saved the parent L1SS state, we will restore junk to
> the parent, which means the L1 Substates likely won't work correctly.
> 
> Save the L1SS config for both the device and its parent in
> pci_save_aspm_l1ss_state().  When restoring, we need both because L1SS must
> be enabled at the parent (the Downstream Port) before being enabled at the
> child (the Upstream Port).
> 
> Link: https://lore.kernel.org/r/20241115072200.37509-3-jhp@xxxxxxxxxxxxx
> Fixes: 17423360a27a ("PCI/ASPM: Save L1 PM Substates Capability for suspend/resume")
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218394
> Suggested-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>
> Signed-off-by: Jian-Hong Pan <jhp@xxxxxxxxxxxxx>
> [bhelgaas: parallel save/restore structure, simplify commit log, patch at
> https://lore.kernel.org/r/20241212230340.GA3267194@bhelgaas]
> Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> Tested-by: Jian-Hong Pan <jhp@xxxxxxxxxxxxx> # Asus B1400CEAE
> Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

Hi stable maintainers,

Please withhold this commit from stable until its fix ("PCI/ASPM: Fix L1SS 
saving") can be pushed at the same as having this commit alone can causes 
PCIe devices to becomes unavailable and hang the system during PM 
transitions.

The fix is currently in pci/for-linus as the commit c312f005dedc, but 
Bjorn might add more reported-by/tested-by tags if more people hit it 
before the commit makes into Linus' tree so don't expect that commit id to 
be stable just yet.

-- 
 i.

> ---
>  drivers/pci/pcie/aspm.c | 33 ++++++++++++++++++++++++++++-----
>  1 file changed, 28 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
> index 28567d457613b..e0bc90597dcad 100644
> --- a/drivers/pci/pcie/aspm.c
> +++ b/drivers/pci/pcie/aspm.c
> @@ -81,24 +81,47 @@ void pci_configure_aspm_l1ss(struct pci_dev *pdev)
>  
>  void pci_save_aspm_l1ss_state(struct pci_dev *pdev)
>  {
> +	struct pci_dev *parent = pdev->bus->self;
>  	struct pci_cap_saved_state *save_state;
> -	u16 l1ss = pdev->l1ss;
>  	u32 *cap;
>  
> +	/*
> +	 * If this is a Downstream Port, we never restore the L1SS state
> +	 * directly; we only restore it when we restore the state of the
> +	 * Upstream Port below it.
> +	 */
> +	if (pcie_downstream_port(pdev) || !parent)
> +		return;
> +
> +	if (!pdev->l1ss || !parent->l1ss)
> +		return;
> +
>  	/*
>  	 * Save L1 substate configuration. The ASPM L0s/L1 configuration
>  	 * in PCI_EXP_LNKCTL_ASPMC is saved by pci_save_pcie_state().
>  	 */
> -	if (!l1ss)
> +	save_state = pci_find_saved_ext_cap(pdev, PCI_EXT_CAP_ID_L1SS);
> +	if (!save_state)
>  		return;
>  
> -	save_state = pci_find_saved_ext_cap(pdev, PCI_EXT_CAP_ID_L1SS);
> +	cap = &save_state->cap.data[0];
> +	pci_read_config_dword(pdev, pdev->l1ss + PCI_L1SS_CTL2, cap++);
> +	pci_read_config_dword(pdev, pdev->l1ss + PCI_L1SS_CTL1, cap++);
> +
> +	if (parent->state_saved)
> +		return;
> +
> +	/*
> +	 * Save parent's L1 substate configuration so we have it for
> +	 * pci_restore_aspm_l1ss_state(pdev) to restore.
> +	 */
> +	save_state = pci_find_saved_ext_cap(parent, PCI_EXT_CAP_ID_L1SS);
>  	if (!save_state)
>  		return;
>  
>  	cap = &save_state->cap.data[0];
> -	pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL2, cap++);
> -	pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, cap++);
> +	pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL2, cap++);
> +	pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL1, cap++);
>  }
>  
>  void pci_restore_aspm_l1ss_state(struct pci_dev *pdev)
> 

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