6.12-stable review patch. If anyone has any objections, please let me know.
------------------
From: Vasily Khoruzhick <anarsoul@xxxxxxxxx>
[ Upstream commit 0f368cb7ef103f284f75e962c4c89da5aa8ccec7 ]
Drop redundant CLK_PLL_VIDEO0_2X and CLK_PLL.MIPI. These are now
defined in dt-bindings/clock/sun50i-a64-ccu.h
Fixes: ca1170b69968 ("clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux")
Reviewed-by: Dragan Simic <dsimic@xxxxxxxxxxx>
Reviewed-by: Chen-Yu Tsai <wens@xxxxxxxx>
Tested-by: Frank Oltmanns <frank@xxxxxxxxxxxx> # on pinephone
Tested-by: Stuart Gathman <stuart@xxxxxxxxxxx> # on OG pinebook
Signed-off-by: Vasily Khoruzhick <anarsoul@xxxxxxxxx>
Link: https://patch.msgid.link/20250104074035.1611136-3-anarsoul@xxxxxxxxx
Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx>
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
index a8c11c0b4e067..dfba88a5ad0f7 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
@@ -21,7 +21,6 @@
/* PLL_VIDEO0 exported for HDMI PHY */
-#define CLK_PLL_VIDEO0_2X 8
#define CLK_PLL_VE 9
#define CLK_PLL_DDR0 10
@@ -32,7 +31,6 @@
#define CLK_PLL_PERIPH1_2X 14
#define CLK_PLL_VIDEO1 15
#define CLK_PLL_GPU 16
-#define CLK_PLL_MIPI 17
#define CLK_PLL_HSIC 18
#define CLK_PLL_DE 19
#define CLK_PLL_DDR1 20
--
2.39.5
