6.6-stable review patch. If anyone has any objections, please let me know.
------------------
From: Mingwei Zheng <zmw12306@xxxxxxxxx>
[ Upstream commit e8c59791ebb60790c74b2c3ab520f04a8a57219a ]
Add check for the return value of clk_enable() to catch the potential
error.
Fixes: 19f1016ea960 ("pwm: stm32: Fix enable count for clk in .probe()")
Signed-off-by: Mingwei Zheng <zmw12306@xxxxxxxxx>
Signed-off-by: Jiasheng Jiang <jiashengjiangcool@xxxxxxxxx>
Link: https://lore.kernel.org/r/20241215224752.220318-1-zmw12306@xxxxxxxxx
Signed-off-by: Uwe Kleine-König <ukleinek@xxxxxxxxxx>
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
---
drivers/pwm/pwm-stm32.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
index b91a14c895bea..67414b97ef4d2 100644
--- a/drivers/pwm/pwm-stm32.c
+++ b/drivers/pwm/pwm-stm32.c
@@ -635,8 +635,11 @@ static int stm32_pwm_probe(struct platform_device *pdev)
priv->chip.npwm = stm32_pwm_detect_channels(priv, &num_enabled);
/* Initialize clock refcount to number of enabled PWM channels. */
- for (i = 0; i < num_enabled; i++)
- clk_enable(priv->clk);
+ for (i = 0; i < num_enabled; i++) {
+ ret = clk_enable(priv->clk);
+ if (ret)
+ return ret;
+ }
ret = devm_pwmchip_add(dev, &priv->chip);
if (ret < 0)
--
2.39.5
