6.12-stable review patch. If anyone has any objections, please let me know.
------------------
From: Francesco Dolcini <francesco.dolcini@xxxxxxxxxxx>
commit 1aa772be0444a2bd06957f6d31865e80e6ae4244 upstream.
Add fsl,pps-channel property to select where to connect the PPS signal.
This depends on the internal SoC routing and on the board, for example
on the i.MX8 SoC it can be connected to an external pin (using channel 1)
or to internal eDMA as DMA request (channel 0).
Signed-off-by: Francesco Dolcini <francesco.dolcini@xxxxxxxxxxx>
Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
Signed-off-by: Paolo Abeni <pabeni@xxxxxxxxxx>
Signed-off-by: Csókás, Bence <csokas.bence@xxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/net/fsl,fec.yaml | 7 +++++++
1 file changed, 7 insertions(+)
--- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
@@ -183,6 +183,13 @@ properties:
description:
Register bits of stop mode control, the format is <&gpr req_gpr req_bit>.
+ fsl,pps-channel:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 0
+ description:
+ Specifies to which timer instance the PPS signal is routed.
+ enum: [0, 1, 2, 3]
+
mdio:
$ref: mdio.yaml#
unevaluatedProperties: false
