Re: [PATCH 6.1/6.6] drm/amd/display: Add NULL check for clk_mgr in dcn32_init_hw

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[ Sasha's backport helper bot ]

Hi,

The upstream commit SHA1 provided is correct: c395fd47d1565bd67671f45cca281b3acc2c31ef

WARNING: Author mismatch between patch and upstream commit:
Backport author: Xiangyu Chen <xiangyu.chen@xxxxxxxxxxxxxxxxx>
Commit author: Srinivasan Shanmugam <srinivasan.shanmugam@xxxxxxx>


Status in newer kernel trees:
6.12.y | Present (exact SHA1)
6.11.y | Present (different SHA1: 7d1854c86d02)
6.6.y | Not found

Note: The patch differs from the upstream commit:
---
--- -	2024-11-27 08:13:56.535837686 -0500
+++ /tmp/tmp.D5591VsMbI	2024-11-27 08:13:56.530278146 -0500
@@ -1,3 +1,5 @@
+[ Upstream commit c395fd47d1565bd67671f45cca281b3acc2c31ef ]
+
 This commit addresses a potential null pointer dereference issue in the
 `dcn32_init_hw` function. The issue could occur when `dc->clk_mgr` is
 null.
@@ -19,24 +21,27 @@
 Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@xxxxxxx>
 Reviewed-by: Alex Hung <alex.hung@xxxxxxx>
 Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
+Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
+[Xiangyu: BP to fix CVE: CVE-2024-49915, modified the source path]
+Signed-off-by: Xiangyu Chen <xiangyu.chen@xxxxxxxxxxxxx>
 ---
- drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 7 ++++---
+ drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 7 ++++---
  1 file changed, 4 insertions(+), 3 deletions(-)
 
-diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
-index a7cb003f1dfb7..fcaabad204a25 100644
---- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
-+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
-@@ -779,7 +779,7 @@ void dcn32_init_hw(struct dc *dc)
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
+index d3ad13bf35c8..55a24d9f5b14 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
+@@ -811,7 +811,7 @@ void dcn32_init_hw(struct dc *dc)
+ 	int edp_num;
  	uint32_t backlight = MAX_BACKLIGHT_LEVEL;
- 	uint32_t user_level = MAX_BACKLIGHT_LEVEL;
  
 -	if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks)
 +	if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks)
  		dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);
  
  	// Initialize the dccg
-@@ -958,10 +958,11 @@ void dcn32_init_hw(struct dc *dc)
+@@ -970,10 +970,11 @@ void dcn32_init_hw(struct dc *dc)
  	if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)
  		dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);
  
@@ -50,3 +55,6 @@
  		dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr);
  
  	if (dc->res_pool->hubbub->funcs->force_pstate_change_control)
+-- 
+2.25.1
+
---

Results of testing on various branches:

| Branch                    | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-6.6.y        |  Success    |  Success   |
| stable/linux-6.1.y        |  Success    |  Success   |




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