[ Sasha's backport helper bot ]
Hi,
The upstream commit SHA1 provided is correct: 8e4ed3cf1642df0c4456443d865cff61a9598aa8
WARNING: Author mismatch between patch and upstream commit:
Backport author: Xiangyu Chen <xiangyu.chen@xxxxxxxxxxxxxxxxx>
Commit author: Srinivasan Shanmugam <srinivasan.shanmugam@xxxxxxx>
Status in newer kernel trees:
6.12.y | Present (exact SHA1)
6.11.y | Present (different SHA1: 65a6fee22d5c)
6.6.y | Not found
Note: The patch differs from the upstream commit:
---
--- - 2024-11-26 10:32:22.782798199 -0500
+++ /tmp/tmp.h38Qae9tjS 2024-11-26 10:32:22.774777464 -0500
@@ -1,3 +1,5 @@
+[ Upstream commit 8e4ed3cf1642df0c4456443d865cff61a9598aa8 ]
+
This commit addresses a null pointer dereference issue in the
`dcn20_program_pipe` function. The issue could occur when
`pipe_ctx->plane_state` is null.
@@ -18,17 +20,23 @@
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@xxxxxxx>
Reviewed-by: Tom Chung <chiahsuan.chung@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
+Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
+[Xiangyu: BP to fix CVE: CVE-2024-49914, modified the file path from
+drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c to
+drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c
+and minor conflict resolution]
+Signed-off-by: Xiangyu Chen <xiangyu.chen@xxxxxxxxxxxxx>
---
- .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 30 ++++++++++++-------
- 1 file changed, 19 insertions(+), 11 deletions(-)
+ .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 22 ++++++++++++-------
+ 1 file changed, 14 insertions(+), 8 deletions(-)
-diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
-index 270e337ae27bb..5a6064999033b 100644
---- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
-+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
-@@ -1922,22 +1922,29 @@ static void dcn20_program_pipe(
- dc->res_pool->hubbub, pipe_ctx->plane_res.hubp->inst, pipe_ctx->hubp_regs.det_size);
- }
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+index 12af2859002f..cd1d1b7283ab 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+@@ -1732,17 +1732,22 @@ static void dcn20_program_pipe(
+ dc->res_pool->hubbub->funcs->program_det_size(
+ dc->res_pool->hubbub, pipe_ctx->plane_res.hubp->inst, pipe_ctx->det_buffer_size_kb);
- if (pipe_ctx->update_flags.raw || pipe_ctx->plane_state->update_flags.raw || pipe_ctx->stream->update_flags.raw)
+ if (pipe_ctx->update_flags.raw ||
@@ -42,16 +50,6 @@
+ (pipe_ctx->plane_state && pipe_ctx->plane_state->update_flags.bits.hdr_mult))
hws->funcs.set_hdr_multiplier(pipe_ctx);
- if (hws->funcs.populate_mcm_luts) {
-- hws->funcs.populate_mcm_luts(dc, pipe_ctx, pipe_ctx->plane_state->mcm_luts,
-- pipe_ctx->plane_state->lut_bank_a);
-- pipe_ctx->plane_state->lut_bank_a = !pipe_ctx->plane_state->lut_bank_a;
-+ if (pipe_ctx->plane_state) {
-+ hws->funcs.populate_mcm_luts(dc, pipe_ctx, pipe_ctx->plane_state->mcm_luts,
-+ pipe_ctx->plane_state->lut_bank_a);
-+ pipe_ctx->plane_state->lut_bank_a = !pipe_ctx->plane_state->lut_bank_a;
-+ }
- }
if (pipe_ctx->update_flags.bits.enable ||
- pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
- pipe_ctx->plane_state->update_flags.bits.gamma_change ||
@@ -65,7 +63,7 @@
hws->funcs.set_input_transfer_func(dc, pipe_ctx, pipe_ctx->plane_state);
/* dcn10_translate_regamma_to_hw_format takes 750us to finish
-@@ -1947,7 +1954,8 @@ static void dcn20_program_pipe(
+@@ -1752,7 +1757,8 @@ static void dcn20_program_pipe(
if (pipe_ctx->update_flags.bits.enable ||
pipe_ctx->update_flags.bits.plane_changed ||
pipe_ctx->stream->update_flags.bits.out_tf ||
@@ -75,7 +73,7 @@
hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);
/* If the pipe has been enabled or has a different opp, we
-@@ -1971,7 +1979,7 @@ static void dcn20_program_pipe(
+@@ -1776,7 +1782,7 @@ static void dcn20_program_pipe(
}
/* Set ABM pipe after other pipe configurations done */
@@ -84,3 +82,6 @@
if (pipe_ctx->stream_res.abm) {
dc->hwss.set_pipe(pipe_ctx);
pipe_ctx->stream_res.abm->funcs->set_abm_level(pipe_ctx->stream_res.abm,
+--
+2.43.0
+
---
Results of testing on various branches:
| Branch | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-6.6.y | Success | Success |
