> Subject: [PATCH] clk: imx8mp: Fix clkout1/2 support
>
> The CLKOUTn may be fed from PLL1/2/3, but the PLL1/2/3 has to be
> enabled first by setting PLL_CLKE bit 11 in
> CCM_ANALOG_SYS_PLLn_GEN_CTRL register.
> The CCM_ANALOG_SYS_PLLn_GEN_CTRL bit 11 is modeled by plln_out
> clock. Fix the clock tree and place the clkout1/2 under plln_sel instead
> of plain plln to let the clock subsystem correctly control the bit 11 and
> enable the PLL in case the CLKOUTn is supplied by PLL1/2/3.
>
> Fixes: 43896f56b59e ("clk: imx8mp: add clkout1/2 support")
> Signed-off-by: Marek Vasut <marex@xxxxxxx>
> ---
Reviewed-by: Peng Fan <peng.fan@xxxxxxx>
