Dan Williams wrote: > When the CXL subsystem is built-in the module init order is determined > by Makefile order. That order violates expectations. The expectation is > that cxl_acpi and cxl_mem can race to attach and that if cxl_acpi wins > the race cxl_mem will find the enabled CXL root ports it needs and if > cxl_acpi loses the race it will retrigger cxl_mem to attach via > cxl_bus_rescan(). That only works if cxl_acpi can assume ports are > enabled immediately upon cxl_acpi_probe() return. That in turn can only > happen in the CONFIG_CXL_ACPI=y case if the cxl_port object appears > before the cxl_acpi object in the Makefile. > > Fix up the order to prevent initialization failures, and make sure that > cxl_port is built-in if cxl_acpi is also built-in. > > As for what contributed to this not being found earlier, the CXL > regression environment, cxl_test, builds all CXL functionality as a > module to allow to symbol mocking and other dynamic reload tests. As a > result there is no regression coverage for the built-in case. > > Reported-by: Gregory Price <gourry@xxxxxxxxxx> > Closes: http://lore.kernel.org/20241004212504.1246-1-gourry@xxxxxxxxxx > Tested-by: Gregory Price <gourry@xxxxxxxxxx> > Fixes: 8dd2bc0f8e02 ("cxl/mem: Add the cxl_mem driver") > Cc: <stable@xxxxxxxxxxxxxxx> > Cc: Davidlohr Bueso <dave@xxxxxxxxxxxx> > Cc: Jonathan Cameron <jonathan.cameron@xxxxxxxxxx> > Cc: Dave Jiang <dave.jiang@xxxxxxxxx> > Cc: Alison Schofield <alison.schofield@xxxxxxxxx> > Cc: Vishal Verma <vishal.l.verma@xxxxxxxxx> > Cc: Ira Weiny <ira.weiny@xxxxxxxxx> > Signed-off-by: Dan Williams <dan.j.williams@xxxxxxxxx> Reviewed-by: Ira Weiny <ira.weiny@xxxxxxxxx> [snip]
