Patch "ARM: lpae: fix definition of PTE_HWTABLE_PTRS" has been added to the 3.10-stable tree

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This is a note to let you know that I've just added the patch titled

    ARM: lpae: fix definition of PTE_HWTABLE_PTRS

to the 3.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm-lpae-fix-definition-of-pte_hwtable_ptrs.patch
and it can be found in the queue-3.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From e38a517578d6c0f764b0d0f6e26dcdf9f70c69d7 Mon Sep 17 00:00:00 2001
From: Will Deacon <will.deacon@xxxxxxx>
Date: Thu, 2 May 2013 13:52:01 +0100
Subject: ARM: lpae: fix definition of PTE_HWTABLE_PTRS

From: Will Deacon <will.deacon@xxxxxxx>

commit e38a517578d6c0f764b0d0f6e26dcdf9f70c69d7 upstream.

For 2-level page tables, PTE_HWTABLE_PTRS describes the offset between
Linux PTEs and hardware PTEs. On LPAE, there is no distinction (since
we have 64-bit descriptors with plenty of space) so PTE_HWTABLE_PTRS
should be 0. Unfortunately, it is wrongly defined as PTRS_PER_PTE,
meaning that current pte table flushing is off by a page. Luckily,
all current LPAE implementations are SMP, so the hardware walker can
snoop L1.

This patch fixes the broken definition.

Acked-by: Catalin Marinas <catalin.marinas@xxxxxxx>
Signed-off-by: Will Deacon <will.deacon@xxxxxxx>
Cc: Hou Pengyang <houpengyang@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 arch/arm/include/asm/pgtable-3level.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/arm/include/asm/pgtable-3level.h
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -33,7 +33,7 @@
 #define PTRS_PER_PMD		512
 #define PTRS_PER_PGD		4
 
-#define PTE_HWTABLE_PTRS	(PTRS_PER_PTE)
+#define PTE_HWTABLE_PTRS	(0)
 #define PTE_HWTABLE_OFF		(0)
 #define PTE_HWTABLE_SIZE	(PTRS_PER_PTE * sizeof(u64))
 


Patches currently in stable-queue which might be from will.deacon@xxxxxxx are

queue-3.10/arm-dma-ensure-that-old-section-mappings-are-flushed-from-the-tlb.patch
queue-3.10/arm-8109-1-mm-modify-pte_write-and-pmd_write-logic-for-lpae.patch
queue-3.10/arm-lpae-fix-definition-of-pte_hwtable_ptrs.patch
queue-3.10/arm-7866-1-include-asm-use-long-long-instead-of-u64-within-atomic.h.patch
queue-3.10/arm-fix-type-of-phys_pfn_offset-to-unsigned-long.patch
queue-3.10/arm-lpae-use-signed-arithmetic-for-mask-definitions.patch
queue-3.10/arm-mm-correct-pte_same-behaviour-for-lpae.patch
queue-3.10/arm-7931-1-correct-virt_addr_valid.patch
queue-3.10/arm-8108-1-mm-introduce-pte-pmd-_isset-and.patch
queue-3.10/arm-lpae-use-phys_addr_t-in-alloc_init_pud.patch
queue-3.10/arm-7867-1-include-asm-use-int-instead-of-unsigned-long-for-oldval-in-atomic_cmpxchg.patch
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