6.1-stable review patch. If anyone has any objections, please let me know.
------------------
From: Weili Qian <qianweili@xxxxxxxxxx>
[ Upstream commit 391dde6e48ff84687395a0a4e84f7e1540301e4e ]
Enable sva error interrupt event. When an error occurs on
the sva module, the device reports an abnormal interrupt to
the driver.
Signed-off-by: Weili Qian <qianweili@xxxxxxxxxx>
Signed-off-by: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
Stable-dep-of: 145013f72394 ("crypto: hisilicon/hpre - mask cluster timeout error")
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index 269df4ec148ba..19a36facabcc4 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -203,7 +203,7 @@ static const struct hisi_qm_cap_info hpre_basic_info[] = {
{HPRE_QM_RESET_MASK_CAP, 0x3128, 0, GENMASK(31, 0), 0x0, 0xC37, 0x6C37},
{HPRE_QM_OOO_SHUTDOWN_MASK_CAP, 0x3128, 0, GENMASK(31, 0), 0x0, 0x4, 0x6C37},
{HPRE_QM_CE_MASK_CAP, 0x312C, 0, GENMASK(31, 0), 0x0, 0x8, 0x8},
- {HPRE_NFE_MASK_CAP, 0x3130, 0, GENMASK(31, 0), 0x0, 0x3FFFFE, 0xFFFFFE},
+ {HPRE_NFE_MASK_CAP, 0x3130, 0, GENMASK(31, 0), 0x0, 0x3FFFFE, 0x1FFFFFE},
{HPRE_RESET_MASK_CAP, 0x3134, 0, GENMASK(31, 0), 0x0, 0x3FFFFE, 0xBFFFFE},
{HPRE_OOO_SHUTDOWN_MASK_CAP, 0x3134, 0, GENMASK(31, 0), 0x0, 0x22, 0xBFFFFE},
{HPRE_CE_MASK_CAP, 0x3138, 0, GENMASK(31, 0), 0x0, 0x1, 0x1},
@@ -283,6 +283,9 @@ static const struct hpre_hw_error hpre_hw_errors[] = {
}, {
.int_msk = BIT(23),
.msg = "sva_fsm_timeout_int_set"
+ }, {
+ .int_msk = BIT(24),
+ .msg = "sva_int_set"
}, {
/* sentinel */
}
--
2.43.0
