[PATCH] scsi: megaraid: Remove redundant check in megasas_init_fw()

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This is cosmetic fix.

The memory for 'fusion' (instance->ctrl_context) is allocated in
megasas_alloc_ctrl_mem() in a call to megasas_alloc_fusion_context().
A possible allocation error is handled after megasas_alloc_ctrl_mem()
with a fail_alloc_dma_buf label transition.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: George Rurikov <g.ryurikov@xxxxxxxxxxxxxxx>
---
 drivers/scsi/megaraid/megaraid_sas_base.c | 111 +++++++++++-----------
 1 file changed, 54 insertions(+), 57 deletions(-)

diff --git a/drivers/scsi/megaraid/megaraid_sas_base.c b/drivers/scsi/megaraid/megaraid_sas_base.c
index 6c79c350a4d5..e4823680e009 100644
--- a/drivers/scsi/megaraid/megaraid_sas_base.c
+++ b/drivers/scsi/megaraid/megaraid_sas_base.c
@@ -6149,68 +6149,65 @@ static int megasas_init_fw(struct megasas_instance *instance)

                scratch_pad_1 = megasas_readl
                        (instance, &instance->reg_set->outbound_scratch_pad_1);
-               /* Check max MSI-X vectors */
-               if (fusion) {
-                       if (instance->adapter_type == THUNDERBOLT_SERIES) {
-                               /* Thunderbolt Series*/
-                               instance->msix_vectors = (scratch_pad_1
-                                       & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
-                       } else {
-                               instance->msix_vectors = ((scratch_pad_1
-                                       & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
-                                       >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
-
-                               /*
-                                * For Invader series, > 8 MSI-x vectors
-                                * supported by FW/HW implies combined
-                                * reply queue mode is enabled.
-                                * For Ventura series, > 16 MSI-x vectors
-                                * supported by FW/HW implies combined
-                                * reply queue mode is enabled.
-                                */
-                               switch (instance->adapter_type) {
-                               case INVADER_SERIES:
-                                       if (instance->msix_vectors > 8)
-                                               instance->msix_combined = true;
-                                       break;
-                               case AERO_SERIES:
-                               case VENTURA_SERIES:
-                                       if (instance->msix_vectors > 16)
-                                               instance->msix_combined = true;
-                                       break;
-                               }

-                               if (rdpq_enable)
-                                       instance->is_rdpq = (scratch_pad_1 & MR_RDPQ_MODE_OFFSET) ?
-                                                               1 : 0;
+               if (instance->adapter_type == THUNDERBOLT_SERIES) {
+                       /* Thunderbolt Series*/
+                       instance->msix_vectors = (scratch_pad_1
+                               & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
+               } else {
+                       instance->msix_vectors = ((scratch_pad_1
+                               & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
+                               >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;

-                               if (instance->adapter_type >= INVADER_SERIES &&
-                                   !instance->msix_combined) {
-                                       instance->msix_load_balance = true;
-                                       instance->smp_affinity_enable = false;
-                               }
+                       /*
+                               * For Invader series, > 8 MSI-x vectors
+                               * supported by FW/HW implies combined
+                               * reply queue mode is enabled.
+                               * For Ventura series, > 16 MSI-x vectors
+                               * supported by FW/HW implies combined
+                               * reply queue mode is enabled.
+                               */
+                       switch (instance->adapter_type) {
+                       case INVADER_SERIES:
+                               if (instance->msix_vectors > 8)
+                                       instance->msix_combined = true;
+                               break;
+                       case AERO_SERIES:
+                       case VENTURA_SERIES:
+                               if (instance->msix_vectors > 16)
+                                       instance->msix_combined = true;
+                               break;
+                       }

-                               /* Save 1-15 reply post index address to local memory
-                                * Index 0 is already saved from reg offset
-                                * MPI2_REPLY_POST_HOST_INDEX_OFFSET
-                                */
-                               for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
-                                       instance->reply_post_host_index_addr[loop] =
-                                               (u32 __iomem *)
-                                               ((u8 __iomem *)instance->reg_set +
-                                               MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
-                                               + (loop * 0x10));
-                               }
+                       if (rdpq_enable)
+                               instance->is_rdpq = (scratch_pad_1 & MR_RDPQ_MODE_OFFSET) ?
+                                                       1 : 0;
+
+                       if (instance->adapter_type >= INVADER_SERIES &&
+                               !instance->msix_combined) {
+                               instance->msix_load_balance = true;
+                               instance->smp_affinity_enable = false;
                        }

-                       dev_info(&instance->pdev->dev,
-                                "firmware supports msix\t: (%d)",
-                                instance->msix_vectors);
-                       if (msix_vectors)
-                               instance->msix_vectors = min(msix_vectors,
-                                       instance->msix_vectors);
-               } else /* MFI adapters */
-                       instance->msix_vectors = 1;
+                       /* Save 1-15 reply post index address to local memory
+                               * Index 0 is already saved from reg offset
+                               * MPI2_REPLY_POST_HOST_INDEX_OFFSET
+                               */
+                       for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
+                               instance->reply_post_host_index_addr[loop] =
+                                       (u32 __iomem *)
+                                       ((u8 __iomem *)instance->reg_set +
+                                       MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
+                                       + (loop * 0x10));
+                       }
+               }
+
+               dev_info(&instance->pdev->dev,
+                               "firmware supports msix\t: (%d)",
+                               instance->msix_vectors);
+               if (msix_vectors)
+                       instance->msix_vectors = min(msix_vectors,
+                               instance->msix_vectors);


                /*
--
2.34.1

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