[Public] > -----Original Message----- > From: Sasha Levin <sashal@xxxxxxxxxx> > Sent: Wednesday, August 21, 2024 9:33 AM > To: stable-commits@xxxxxxxxxxxxxxx; Xiao, Jack <Jack.Xiao@xxxxxxx> > Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Koenig, Christian > <Christian.Koenig@xxxxxxx>; Pan, Xinhui <Xinhui.Pan@xxxxxxx>; David > Airlie <airlied@xxxxxxxxx>; Daniel Vetter <daniel@xxxxxxxx> > Subject: Patch "drm/amdgpu/gfx11: need acquire mutex before access > CP_VMID_RESET v2" has been added to the 6.6-stable tree > > This is a note to let you know that I've just added the patch titled > > drm/amdgpu/gfx11: need acquire mutex before access CP_VMID_RESET v2 > > to the 6.6-stable tree which can be found at: > http://www.kernel.org/git/?p=linux/kernel/git/stable/stable- > queue.git;a=summary > > The filename of the patch is: > drm-amdgpu-gfx11-need-acquire-mutex-before-access-cp.patch > and it can be found in the queue-6.6 subdirectory. > > If you, or anyone else, feels it should not be added to the stable tree, please let > <stable@xxxxxxxxxxxxxxx> know about it. > This patch is not stable material. Please drop for stable. Thanks, Alex > > > commit 72516630230bee2668c491fdafcac27c565a5ad5 > Author: Jack Xiao <Jack.Xiao@xxxxxxx> > Date: Tue Dec 19 17:10:34 2023 +0800 > > drm/amdgpu/gfx11: need acquire mutex before access CP_VMID_RESET v2 > > [ Upstream commit 4b5c5f5ad38b9435518730cc7f8f1e8de9c5cb2f ] > > It's required to take the gfx mutex before access to CP_VMID_RESET, > for there is a race condition with CP firmware to write the register. > > v2: add extra code to ensure the mutex releasing is successful. > > Signed-off-by: Jack Xiao <Jack.Xiao@xxxxxxx> > Reviewed-by: Hawking Zhang <Hawking.Zhang@xxxxxxx> > Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> > Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c > b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c > index c81e98f0d17ff..17a09e96b30fc 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c > @@ -4430,11 +4430,43 @@ static int gfx_v11_0_wait_for_idle(void *handle) > return -ETIMEDOUT; > } > > +static int gfx_v11_0_request_gfx_index_mutex(struct amdgpu_device *adev, > + int req) > +{ > + u32 i, tmp, val; > + > + for (i = 0; i < adev->usec_timeout; i++) { > + /* Request with MeId=2, PipeId=0 */ > + tmp = REG_SET_FIELD(0, CP_GFX_INDEX_MUTEX, REQUEST, > req); > + tmp = REG_SET_FIELD(tmp, CP_GFX_INDEX_MUTEX, > CLIENTID, 4); > + WREG32_SOC15(GC, 0, regCP_GFX_INDEX_MUTEX, tmp); > + > + val = RREG32_SOC15(GC, 0, regCP_GFX_INDEX_MUTEX); > + if (req) { > + if (val == tmp) > + break; > + } else { > + tmp = REG_SET_FIELD(tmp, CP_GFX_INDEX_MUTEX, > + REQUEST, 1); > + > + /* unlocked or locked by firmware */ > + if (val != tmp) > + break; > + } > + udelay(1); > + } > + > + if (i >= adev->usec_timeout) > + return -EINVAL; > + > + return 0; > +} > + > static int gfx_v11_0_soft_reset(void *handle) { > u32 grbm_soft_reset = 0; > u32 tmp; > - int i, j, k; > + int r, i, j, k; > struct amdgpu_device *adev = (struct amdgpu_device *)handle; > > tmp = RREG32_SOC15(GC, 0, regCP_INT_CNTL); @@ -4474,6 > +4506,13 @@ static int gfx_v11_0_soft_reset(void *handle) > } > } > > + /* Try to acquire the gfx mutex before access to CP_VMID_RESET */ > + r = gfx_v11_0_request_gfx_index_mutex(adev, 1); > + if (r) { > + DRM_ERROR("Failed to acquire the gfx mutex during soft > reset\n"); > + return r; > + } > + > WREG32_SOC15(GC, 0, regCP_VMID_RESET, 0xfffffffe); > > // Read CP_VMID_RESET register three times. > @@ -4482,6 +4521,13 @@ static int gfx_v11_0_soft_reset(void *handle) > RREG32_SOC15(GC, 0, regCP_VMID_RESET); > RREG32_SOC15(GC, 0, regCP_VMID_RESET); > > + /* release the gfx mutex */ > + r = gfx_v11_0_request_gfx_index_mutex(adev, 0); > + if (r) { > + DRM_ERROR("Failed to release the gfx mutex during soft > reset\n"); > + return r; > + } > + > for (i = 0; i < adev->usec_timeout; i++) { > if (!RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) && > !RREG32_SOC15(GC, 0, regCP_GFX_HQD_ACTIVE))
