On Sun, Jun 16, 2024 at 02:25:02PM +0100, Jiaxun Yang wrote:
> Target register of mftc0 should be __res instead of $1, this is
> a leftover from old .insn code.
>
> Fixes: dd6d29a61489 ("MIPS: Implement microMIPS MT ASE helpers")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
> ---
> arch/mips/include/asm/mipsmtregs.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/include/asm/mipsmtregs.h b/arch/mips/include/asm/mipsmtregs.h
> index 30e86861c206..b1ee3c48e84b 100644
> --- a/arch/mips/include/asm/mipsmtregs.h
> +++ b/arch/mips/include/asm/mipsmtregs.h
> @@ -322,7 +322,7 @@ static inline void ehb(void)
> " .set push \n" \
> " .set "MIPS_ISA_LEVEL" \n" \
> _ASM_SET_MFTC0 \
> - " mftc0 $1, " #rt ", " #sel " \n" \
> + " mftc0 %0, " #rt ", " #sel " \n" \
> _ASM_UNSET_MFTC0 \
> " .set pop \n" \
> : "=r" (__res)); \
>
> --
> 2.43.0
applied to mips-fixes.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
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