Re: [PATCH 1/2] LoongArch: Initialise unused Direct Map Windows

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Hi, Jiaxun,

On Fri, Jun 14, 2024 at 12:41 AM Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> wrote:
>
> DMW 2 & 3 are unused by kernel, however firmware may leave
> garbage in them and interfere kernel's address mapping.
>
> Clear them as necessary.
I think the current status is as expected, we don't want kernel access
to non-8000 and non-9000 addresses. And low-end chips may have only
two DMWs.

Huacai


Huacai

>
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
> ---
>  arch/loongarch/include/asm/loongarch.h   |  4 ++++
>  arch/loongarch/include/asm/stackframe.h  | 11 +++++++++++
>  arch/loongarch/kernel/head.S             | 12 ++----------
>  arch/loongarch/power/suspend_asm.S       |  6 +-----
>  drivers/firmware/efi/libstub/loongarch.c |  2 ++
>  5 files changed, 20 insertions(+), 15 deletions(-)
>
> diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
> index eb09adda54b7..3720096efcf9 100644
> --- a/arch/loongarch/include/asm/loongarch.h
> +++ b/arch/loongarch/include/asm/loongarch.h
> @@ -889,6 +889,10 @@
>  #define CSR_DMW1_BASE          (CSR_DMW1_VSEG << DMW_PABITS)
>  #define CSR_DMW1_INIT          (CSR_DMW1_BASE | CSR_DMW1_MAT | CSR_DMW1_PLV0)
>
> +/* Direct Map window 2/3 - unused */
> +#define CSR_DMW2_INIT          0
> +#define CSR_DMW3_INIT          0
> +
>  /* Performance Counter registers */
>  #define LOONGARCH_CSR_PERFCTRL0                0x200   /* 32 perf event 0 config */
>  #define LOONGARCH_CSR_PERFCNTR0                0x201   /* 64 perf event 0 count value */
> diff --git a/arch/loongarch/include/asm/stackframe.h b/arch/loongarch/include/asm/stackframe.h
> index d9eafd3ee3d1..10c5dcf56bc7 100644
> --- a/arch/loongarch/include/asm/stackframe.h
> +++ b/arch/loongarch/include/asm/stackframe.h
> @@ -38,6 +38,17 @@
>         cfi_restore \reg \offset \docfi
>         .endm
>
> +       .macro SETUP_DMWS temp1
> +       li.d    \temp1, CSR_DMW0_INIT
> +       csrwr   \temp1, LOONGARCH_CSR_DMWIN0
> +       li.d    \temp1, CSR_DMW1_INIT
> +       csrwr   \temp1, LOONGARCH_CSR_DMWIN1
> +       li.d    \temp1, CSR_DMW2_INIT
> +       csrwr   \temp1, LOONGARCH_CSR_DMWIN2
> +       li.d    \temp1, CSR_DMW3_INIT
> +       csrwr   \temp1, LOONGARCH_CSR_DMWIN3
> +       .endm
> +
>  /* Jump to the runtime virtual address. */
>         .macro JUMP_VIRT_ADDR temp1 temp2
>         li.d    \temp1, CACHE_BASE
> diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S
> index 4677ea8fa8e9..1a71fc09bfd6 100644
> --- a/arch/loongarch/kernel/head.S
> +++ b/arch/loongarch/kernel/head.S
> @@ -44,11 +44,7 @@ SYM_DATA(kernel_fsize, .long _kernel_fsize);
>  SYM_CODE_START(kernel_entry)                   # kernel entry point
>
>         /* Config direct window and set PG */
> -       li.d            t0, CSR_DMW0_INIT       # UC, PLV0, 0x8000 xxxx xxxx xxxx
> -       csrwr           t0, LOONGARCH_CSR_DMWIN0
> -       li.d            t0, CSR_DMW1_INIT       # CA, PLV0, 0x9000 xxxx xxxx xxxx
> -       csrwr           t0, LOONGARCH_CSR_DMWIN1
> -
> +       SETUP_DMWS      t0
>         JUMP_VIRT_ADDR  t0, t1
>
>         /* Enable PG */
> @@ -124,11 +120,7 @@ SYM_CODE_END(kernel_entry)
>   * function after setting up the stack and tp registers.
>   */
>  SYM_CODE_START(smpboot_entry)
> -       li.d            t0, CSR_DMW0_INIT       # UC, PLV0
> -       csrwr           t0, LOONGARCH_CSR_DMWIN0
> -       li.d            t0, CSR_DMW1_INIT       # CA, PLV0
> -       csrwr           t0, LOONGARCH_CSR_DMWIN1
> -
> +       SETUP_DMWS      t0
>         JUMP_VIRT_ADDR  t0, t1
>
>  #ifdef CONFIG_PAGE_SIZE_4KB
> diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
> index e2fc3b4e31f0..6fdd74eb219b 100644
> --- a/arch/loongarch/power/suspend_asm.S
> +++ b/arch/loongarch/power/suspend_asm.S
> @@ -73,11 +73,7 @@ SYM_FUNC_START(loongarch_suspend_enter)
>          * Reload all of the registers and return.
>          */
>  SYM_INNER_LABEL(loongarch_wakeup_start, SYM_L_GLOBAL)
> -       li.d            t0, CSR_DMW0_INIT       # UC, PLV0
> -       csrwr           t0, LOONGARCH_CSR_DMWIN0
> -       li.d            t0, CSR_DMW1_INIT       # CA, PLV0
> -       csrwr           t0, LOONGARCH_CSR_DMWIN1
> -
> +       SETUP_DMWS      t0
>         JUMP_VIRT_ADDR  t0, t1
>
>         /* Enable PG */
> diff --git a/drivers/firmware/efi/libstub/loongarch.c b/drivers/firmware/efi/libstub/loongarch.c
> index d0ef93551c44..3782d0a187d1 100644
> --- a/drivers/firmware/efi/libstub/loongarch.c
> +++ b/drivers/firmware/efi/libstub/loongarch.c
> @@ -74,6 +74,8 @@ efi_status_t efi_boot_kernel(void *handle, efi_loaded_image_t *image,
>         /* Config Direct Mapping */
>         csr_write64(CSR_DMW0_INIT, LOONGARCH_CSR_DMWIN0);
>         csr_write64(CSR_DMW1_INIT, LOONGARCH_CSR_DMWIN1);
> +       csr_write64(CSR_DMW2_INIT, LOONGARCH_CSR_DMWIN2);
> +       csr_write64(CSR_DMW3_INIT, LOONGARCH_CSR_DMWIN3);
>
>         real_kernel_entry = (void *)kernel_entry_address(kernel_addr, image);
>
>
> --
> 2.43.0
>
>





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