[PATCH 6.1 212/236] net: bcmgenet: synchronize EXT_RGMII_OOB_CTRL access

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6.1-stable review patch.  If anyone has any objections, please let me know.


From: Doug Berger <opendmb@xxxxxxxxx>

commit d85cf67a339685beae1d0aee27b7f61da95455be upstream.

The EXT_RGMII_OOB_CTRL register can be written from different
contexts. It is predominantly written from the adjust_link
handler which is synchronized by the phydev->lock, but can
also be written from a different context when configuring the
mii in bcmgenet_mii_config().

The chances of contention are quite low, but it is conceivable
that adjust_link could occur during resume when WoL is enabled
so use the phydev->lock synchronizer in bcmgenet_mii_config()
to be sure.

Fixes: afe3f907d20f ("net: bcmgenet: power on MII block for all MII modes")
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Doug Berger <opendmb@xxxxxxxxx>
Acked-by: Florian Fainelli <florian.fainelli@xxxxxxxxxxxx>
Signed-off-by: David S. Miller <davem@xxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
 drivers/net/ethernet/broadcom/genet/bcmmii.c |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

--- a/drivers/net/ethernet/broadcom/genet/bcmmii.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c
@@ -2,7 +2,7 @@
  * Broadcom GENET MDIO routines
- * Copyright (c) 2014-2017 Broadcom
+ * Copyright (c) 2014-2024 Broadcom
 #include <linux/acpi.h>
@@ -71,10 +71,12 @@ static void bcmgenet_mac_config(struct n
 	 * transmit -- 25MHz(100Mbps) or 125MHz(1Gbps).
 	 * Receive clock is provided by the PHY.
+	mutex_lock(&phydev->lock);
 	reg = bcmgenet_ext_readl(priv, EXT_RGMII_OOB_CTRL);
 	reg &= ~OOB_DISABLE;
 	reg |= RGMII_LINK;
 	bcmgenet_ext_writel(priv, reg, EXT_RGMII_OOB_CTRL);
+	mutex_unlock(&phydev->lock);
 	reg = bcmgenet_umac_readl(priv, UMAC_CMD);

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