On Mon, 22 Apr 2024 18:36:27 -0400 Sasha Levin <sashal@xxxxxxxxxx> wrote: > This is a note to let you know that I've just added the patch titled > > PCI: Use PCI_HEADER_TYPE_* instead of literals > > to the 6.6-stable tree which can be found at: > http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary > > The filename of the patch is: > pci-use-pci_header_type_-instead-of-literals.patch > and it can be found in the queue-6.6 subdirectory. > > If you, or anyone else, feels it should not be added to the stable > tree, please let <stable@xxxxxxxxxxxxxxx> know about it. > > > > commit 47a6faa3158d5013c24f05c59c3d3b84f273d9dd > Author: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx> > Date: Tue Oct 3 15:53:00 2023 +0300 > > PCI: Use PCI_HEADER_TYPE_* instead of literals > > [ Upstream commit 83c088148c8e5c439eec6c7651692f797547e1a8 ] > > Replace literals under drivers/pci/ with PCI_HEADER_TYPE_MASK, > PCI_HEADER_TYPE_NORMAL, and PCI_HEADER_TYPE_MFD. > > Also replace !! boolean conversions with FIELD_GET(). > > Link: > https://lore.kernel.org/r/20231003125300.5541-4-ilpo.jarvinen@xxxxxxxxxxxxxxx > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx> > Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx> Reviewed-by: > Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> # for Renesas R-Car > Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> > > diff --git a/drivers/pci/controller/dwc/pci-layerscape.c > b/drivers/pci/controller/dwc/pci-layerscape.c index > b931d597656f6..37956e09c65bd 100644 --- > a/drivers/pci/controller/dwc/pci-layerscape.c +++ > b/drivers/pci/controller/dwc/pci-layerscape.c @@ -58,7 +58,7 @@ > static bool ls_pcie_is_bridge(struct ls_pcie *pcie) u32 header_type; > > header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE); > - header_type &= 0x7f; > + header_type &= PCI_HEADER_TYPE_MASK; > > return header_type == PCI_HEADER_TYPE_BRIDGE; > } > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c index > 45b97a4b14dbd..32951f7d6d6d6 100644 --- > a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c +++ > b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c @@ -539,7 > +539,7 @@ static bool mobiveil_pcie_is_bridge(struct mobiveil_pcie > *pcie) u32 header_type; > header_type = mobiveil_csr_readb(pcie, PCI_HEADER_TYPE); > - header_type &= 0x7f; > + header_type &= PCI_HEADER_TYPE_MASK; > > return header_type == PCI_HEADER_TYPE_BRIDGE; > } > diff --git a/drivers/pci/controller/pcie-iproc.c > b/drivers/pci/controller/pcie-iproc.c index > bd1c98b688516..97f739a2c9f8f 100644 --- > a/drivers/pci/controller/pcie-iproc.c +++ > b/drivers/pci/controller/pcie-iproc.c @@ -783,7 +783,7 @@ static int > iproc_pcie_check_link(struct iproc_pcie *pcie) > /* make sure we are not in EP mode */ > iproc_pci_raw_config_read32(pcie, 0, PCI_HEADER_TYPE, 1, > &hdr_type); > - if ((hdr_type & 0x7f) != PCI_HEADER_TYPE_BRIDGE) { > + if ((hdr_type & PCI_HEADER_TYPE_MASK) != > PCI_HEADER_TYPE_BRIDGE) { dev_err(dev, "in EP mode, hdr=%#02x\n", > hdr_type); return -EFAULT; > } > diff --git a/drivers/pci/controller/pcie-rcar-ep.c > b/drivers/pci/controller/pcie-rcar-ep.c index > f9682df1da619..7034c0ff23d0d 100644 --- > a/drivers/pci/controller/pcie-rcar-ep.c +++ > b/drivers/pci/controller/pcie-rcar-ep.c @@ -43,7 +43,7 @@ static void > rcar_pcie_ep_hw_init(struct rcar_pcie *pcie) rcar_rmw32(pcie, > REXPCAP(0), 0xff, PCI_CAP_ID_EXP); rcar_rmw32(pcie, > REXPCAP(PCI_EXP_FLAGS), PCI_EXP_FLAGS_TYPE, PCI_EXP_TYPE_ENDPOINT << > 4); > - rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f, > + rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), > PCI_HEADER_TYPE_MASK, PCI_HEADER_TYPE_NORMAL); > > /* Write out the physical slot number = 0 */ > diff --git a/drivers/pci/controller/pcie-rcar-host.c > b/drivers/pci/controller/pcie-rcar-host.c index > 88975e40ee2fb..bf7cc0b6a6957 100644 --- > a/drivers/pci/controller/pcie-rcar-host.c +++ > b/drivers/pci/controller/pcie-rcar-host.c @@ -460,7 +460,7 @@ static > int rcar_pcie_hw_init(struct rcar_pcie *pcie) rcar_rmw32(pcie, > REXPCAP(0), 0xff, PCI_CAP_ID_EXP); rcar_rmw32(pcie, > REXPCAP(PCI_EXP_FLAGS), PCI_EXP_FLAGS_TYPE, PCI_EXP_TYPE_ROOT_PORT << > 4); > - rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f, > + rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), > PCI_HEADER_TYPE_MASK, PCI_HEADER_TYPE_BRIDGE); > > /* Enable data link layer active state reporting */ > diff --git a/drivers/pci/controller/vmd.c > b/drivers/pci/controller/vmd.c index 6ac0afae0ca18..2af46e6587aff > 100644 --- a/drivers/pci/controller/vmd.c > +++ b/drivers/pci/controller/vmd.c > @@ -527,7 +527,7 @@ static void vmd_domain_reset(struct vmd_dev *vmd) > > hdr_type = readb(base + PCI_HEADER_TYPE); > > - functions = (hdr_type & 0x80) ? 8 : 1; > + functions = (hdr_type & PCI_HEADER_TYPE_MFD) Acked-by: Nirmal Patel <nirmal.patel@xxxxxxxxxxxxxxx> > ? 8 : 1; for (fn = 0; fn < functions; fn++) { > base = vmd->cfgbar + > PCIE_ECAM_OFFSET(bus, PCI_DEVFN(dev, fn), 0); > diff --git a/drivers/pci/hotplug/cpqphp_ctrl.c > b/drivers/pci/hotplug/cpqphp_ctrl.c index > e429ecddc8feb..c01968ef0bd7b 100644 --- > a/drivers/pci/hotplug/cpqphp_ctrl.c +++ > b/drivers/pci/hotplug/cpqphp_ctrl.c @@ -2059,7 +2059,7 @@ int > cpqhp_process_SS(struct controller *ctrl, struct pci_func *func) > return rc; > /* If it's a bridge, check the VGA Enable > bit */ > - if ((header_type & 0x7F) == > PCI_HEADER_TYPE_BRIDGE) { > + if ((header_type & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_BRIDGE) { rc = pci_bus_read_config_byte(pci_bus, > devfn, PCI_BRIDGE_CONTROL, &BCR); if (rc) > return rc; > @@ -2342,7 +2342,7 @@ static int configure_new_function(struct > controller *ctrl, struct pci_func *func if (rc) > return rc; > > - if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { > + if ((temp_byte & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_BRIDGE) { /* set Primary bus */ > dbg("set Primary bus = %d\n", func->bus); > rc = pci_bus_write_config_byte(pci_bus, devfn, > PCI_PRIMARY_BUS, func->bus); @@ -2739,7 +2739,7 @@ static int > configure_new_function(struct controller *ctrl, struct pci_func *func > * PCI_BRIDGE_CTL_SERR | > * PCI_BRIDGE_CTL_NO_ISA */ > rc = pci_bus_write_config_word(pci_bus, devfn, > PCI_BRIDGE_CONTROL, command); > - } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) { > + } else if ((temp_byte & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_NORMAL) { /* Standard device */ > rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, > &class_code); > diff --git a/drivers/pci/hotplug/cpqphp_pci.c > b/drivers/pci/hotplug/cpqphp_pci.c index 3b248426a9f42..e9f1fb333a718 > 100644 --- a/drivers/pci/hotplug/cpqphp_pci.c > +++ b/drivers/pci/hotplug/cpqphp_pci.c > @@ -363,7 +363,7 @@ int cpqhp_save_config(struct controller *ctrl, > int busnumber, int is_hot_plug) return rc; > > /* If multi-function device, set max_functions to 8 > */ > - if (header_type & 0x80) > + if (header_type & PCI_HEADER_TYPE_MFD) > max_functions = 8; > else > max_functions = 1; > @@ -372,7 +372,7 @@ int cpqhp_save_config(struct controller *ctrl, > int busnumber, int is_hot_plug) > do { > DevError = 0; > - if ((header_type & 0x7F) == > PCI_HEADER_TYPE_BRIDGE) { > + if ((header_type & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_BRIDGE) { /* Recurse the subordinate bus > * get the subordinate bus number > */ > @@ -487,13 +487,13 @@ int cpqhp_save_slot_config(struct controller > *ctrl, struct pci_func *new_slot) > pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, > 0), 0x0B, &class_code); pci_bus_read_config_byte(ctrl->pci_bus, > PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type); > - if (header_type & 0x80) /* Multi-function device */ > + if (header_type & PCI_HEADER_TYPE_MFD) > max_functions = 8; > else > max_functions = 1; > > while (function < max_functions) { > - if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { > + if ((header_type & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_BRIDGE) { /* Recurse the subordinate bus */ > pci_bus_read_config_byte(ctrl->pci_bus, > PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, > &secondary_bus); @@ -571,7 +571,7 @@ int > cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func > *func) /* Check for Bridge */ pci_bus_read_config_byte(pci_bus, > devfn, PCI_HEADER_TYPE, &header_type); > - if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { > + if ((header_type & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_BRIDGE) { pci_bus_read_config_byte(pci_bus, devfn, > PCI_SECONDARY_BUS, &secondary_bus); > sub_bus = (int) secondary_bus; > @@ -625,7 +625,7 @@ int cpqhp_save_base_addr_length(struct controller > *ctrl, struct pci_func *func) > } /* End of base register loop */ > > - } else if ((header_type & 0x7F) == 0x00) { > + } else if ((header_type & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_NORMAL) { /* Figure out IO and memory base lengths */ > for (cloop = 0x10; cloop <= 0x24; cloop += > 4) { temp_register = 0xFFFFFFFF; > @@ -723,7 +723,7 @@ int cpqhp_save_used_resources(struct controller > *ctrl, struct pci_func *func) /* Check for Bridge */ > pci_bus_read_config_byte(pci_bus, devfn, > PCI_HEADER_TYPE, &header_type); > - if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { > + if ((header_type & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_BRIDGE) { /* Clear Bridge Control Register */ > command = 0x00; > pci_bus_write_config_word(pci_bus, devfn, > PCI_BRIDGE_CONTROL, command); @@ -858,7 +858,7 @@ int > cpqhp_save_used_resources(struct controller *ctrl, struct pci_func > *func) } } /* End of base register loop */ > /* Standard header */ > - } else if ((header_type & 0x7F) == 0x00) { > + } else if ((header_type & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_NORMAL) { /* Figure out IO and memory base lengths */ > for (cloop = 0x10; cloop <= 0x24; cloop += > 4) { pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base); > @@ -975,7 +975,7 @@ int cpqhp_configure_board(struct controller > *ctrl, struct pci_func *func) pci_bus_read_config_byte(pci_bus, > devfn, PCI_HEADER_TYPE, &header_type); > /* If this is a bridge device, restore subordinate > devices */ > - if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { > + if ((header_type & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_BRIDGE) { pci_bus_read_config_byte(pci_bus, devfn, > PCI_SECONDARY_BUS, &secondary_bus); > sub_bus = (int) secondary_bus; > @@ -1067,7 +1067,7 @@ int cpqhp_valid_replace(struct controller > *ctrl, struct pci_func *func) /* Check for Bridge */ > pci_bus_read_config_byte(pci_bus, devfn, > PCI_HEADER_TYPE, &header_type); > - if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { > + if ((header_type & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_BRIDGE) { /* In order to continue checking, we must > program the > * bus registers in the bridge to respond to > accesses > * for its subordinate bus(es) > @@ -1090,7 +1090,7 @@ int cpqhp_valid_replace(struct controller > *ctrl, struct pci_func *func) > } > /* Check to see if it is a standard config header */ > - else if ((header_type & 0x7F) == > PCI_HEADER_TYPE_NORMAL) { > + else if ((header_type & PCI_HEADER_TYPE_MASK) == > PCI_HEADER_TYPE_NORMAL) { /* Check subsystem vendor and ID */ > pci_bus_read_config_dword(pci_bus, devfn, > PCI_SUBSYSTEM_VENDOR_ID, &temp_register); > diff --git a/drivers/pci/hotplug/ibmphp.h > b/drivers/pci/hotplug/ibmphp.h index 41eafe511210f..c248a09be7b5d > 100644 --- a/drivers/pci/hotplug/ibmphp.h > +++ b/drivers/pci/hotplug/ibmphp.h > @@ -17,6 +17,7 @@ > */ > > #include <linux/pci_hotplug.h> > +#include <linux/pci_regs.h> > > extern int ibmphp_debug; > > @@ -286,8 +287,8 @@ int ibmphp_register_pci(void); > > /* pci specific defines */ > #define PCI_VENDOR_ID_NOTVALID 0xFFFF > -#define PCI_HEADER_TYPE_MULTIDEVICE 0x80 > -#define PCI_HEADER_TYPE_MULTIBRIDGE 0x81 > +#define PCI_HEADER_TYPE_MULTIDEVICE > (PCI_HEADER_TYPE_MFD|PCI_HEADER_TYPE_NORMAL) +#define > PCI_HEADER_TYPE_MULTIBRIDGE > (PCI_HEADER_TYPE_MFD|PCI_HEADER_TYPE_BRIDGE) #define LATENCY > 0x64 #define CACHE 64 > diff --git a/drivers/pci/hotplug/ibmphp_pci.c > b/drivers/pci/hotplug/ibmphp_pci.c index 50038e5f9ca40..eeb412cbd9fe3 > 100644 --- a/drivers/pci/hotplug/ibmphp_pci.c > +++ b/drivers/pci/hotplug/ibmphp_pci.c > @@ -1087,7 +1087,7 @@ static struct res_needed > *scan_behind_bridge(struct pci_func *func, u8 busno) > pci_bus_read_config_dword(ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, > &class); debug("hdr_type behind the bridge is %x\n", hdr_type); > - if ((hdr_type & 0x7f) == > PCI_HEADER_TYPE_BRIDGE) { > + if ((hdr_type & > PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) { err("embedded > bridges not supported for hot-plugging.\n"); amount->not_correct = 1; > return amount; > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index 06fc6f532d6c4..dae9d9e2826f0 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -534,7 +534,7 @@ u8 pci_bus_find_capability(struct pci_bus *bus, > unsigned int devfn, int cap) > pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, > &hdr_type); > - pos = __pci_bus_find_cap_start(bus, devfn, hdr_type & 0x7f); > + pos = __pci_bus_find_cap_start(bus, devfn, hdr_type & > PCI_HEADER_TYPE_MASK); if (pos) > pos = __pci_find_next_cap(bus, devfn, pos, cap); > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index b3976dcb71f10..675f77ac1968d 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -1849,8 +1849,8 @@ static void quirk_jmicron_ata(struct pci_dev > *pdev) > /* Update pdev accordingly */ > pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr); > - pdev->hdr_type = hdr & 0x7f; > - pdev->multifunction = !!(hdr & 0x80); > + pdev->hdr_type = hdr & PCI_HEADER_TYPE_MASK; > + pdev->multifunction = FIELD_GET(PCI_HEADER_TYPE_MFD, hdr); > > pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class); > pdev->class = class >> 8; > @@ -5710,7 +5710,7 @@ static void quirk_nvidia_hda(struct pci_dev > *gpu) > /* The GPU becomes a multi-function device when the HDA is > enabled */ pci_read_config_byte(gpu, PCI_HEADER_TYPE, &hdr_type); > - gpu->multifunction = !!(hdr_type & 0x80); > + gpu->multifunction = FIELD_GET(PCI_HEADER_TYPE_MFD, > hdr_type); } > DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, > PCI_BASE_CLASS_DISPLAY, 16, > quirk_nvidia_hda);
