On Mon, Mar 25, 2024 at 10:04:41AM -0500, Eric W. Biederman wrote: > Russ Anderson <rja@xxxxxxx> writes: > > Steve can certainly merge his two patches and resubmit, to replace the > > reverted original patch. He should be on in the morning to speak for > > himself. > > I am going to push back and suggest that this is perhaps a bug in the > HPE UV systems firmware not setting up the cpus memory type range > registers correctly. > > Unless those systems are using new fangled cpus that don't have 16bit > and 32bit support, and don't implement memory type range registers, > I don't see how something that only affects HPE UV systems could be > anything except an HPE UV specific bug. Eric, I took the time to communicate with others in the company who know this stuff better than I do before replying on this. One of the problems with using the MTRRs for this is that there are simply not enough of them. The MTRRs size/alignment requirements mean that more than one entry would be required per reserved region, and we need one reserved region per socket on systems that currently can go up to 32 sockets. (In case you would think to ask, the reserved regions also cannot be made contiguous.) So MTRRs will not work to keep speculation out of our reserved memory regions. Let me know if you need more information from us on this. Thanks. --> Steve Wahl -- Steve Wahl, Hewlett Packard Enterprise
