Re: [PATCH] net/mlx5: offset comp irq index in name by one

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On 12/03/2024 0:30, Michael Liang wrote:
The mlx5 comp irq name scheme is changed a little bit between
commit 3663ad34bc70 ("net/mlx5: Shift control IRQ to the last index")
and commit 3354822cde5a ("net/mlx5: Use dynamic msix vectors allocation").
The index in the comp irq name used to start from 0 but now it starts
from 1. There is nothing critical here, but it's harmless to change
back to the old behavior, a.k.a starting from 0.

Fixes: 3354822cde5a ("net/mlx5: Use dynamic msix vectors allocation")
Reviewed-by: Mohamed Khalfella <mkhalfella@xxxxxxxxxxxxxxx>
Reviewed-by: Yuanyuan Zhong <yzhong@xxxxxxxxxxxxxxx>
Signed-off-by: Michael Liang <mliang@xxxxxxxxxxxxxxx>
Reviewed-by: Shay Drory <shayd@xxxxxxxxxx>
---
  drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c b/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
index 4dcf995cb1a2..6bac8ad70ba6 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
@@ -19,6 +19,7 @@
  #define MLX5_IRQ_CTRL_SF_MAX 8
  /* min num of vectors for SFs to be enabled */
  #define MLX5_IRQ_VEC_COMP_BASE_SF 2
+#define MLX5_IRQ_VEC_COMP_BASE 1
#define MLX5_EQ_SHARE_IRQ_MAX_COMP (8)
  #define MLX5_EQ_SHARE_IRQ_MAX_CTRL (UINT_MAX)
@@ -246,6 +247,7 @@ static void irq_set_name(struct mlx5_irq_pool *pool, char *name, int vecidx)
  		return;
  	}
+ vecidx -= MLX5_IRQ_VEC_COMP_BASE;
  	snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", vecidx);
  }
@@ -585,7 +587,7 @@ struct mlx5_irq *mlx5_irq_request_vector(struct mlx5_core_dev *dev, u16 cpu,
  	struct mlx5_irq_table *table = mlx5_irq_table_get(dev);
  	struct mlx5_irq_pool *pool = table->pcif_pool;
  	struct irq_affinity_desc af_desc;
-	int offset = 1;
+	int offset = MLX5_IRQ_VEC_COMP_BASE;
if (!pool->xa_num_irqs.max)
  		offset = 0;




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