Patch "MIPS: tlbex: Fix potential HTW race on TLBL/M/S handlers" has been added to the 3.17-stable tree

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This is a note to let you know that I've just added the patch titled

    MIPS: tlbex: Fix potential HTW race on TLBL/M/S handlers

to the 3.17-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     mips-tlbex-fix-potential-htw-race-on-tlbl-m-s-handlers.patch
and it can be found in the queue-3.17 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 070e76cb3ffe43f6855492e77c96680c562598f0 Mon Sep 17 00:00:00 2001
From: Leonid Yegoshin <Leonid.Yegoshin@xxxxxxxxxx>
Date: Thu, 27 Nov 2014 11:13:08 +0000
Subject: MIPS: tlbex: Fix potential HTW race on TLBL/M/S handlers

From: Leonid Yegoshin <Leonid.Yegoshin@xxxxxxxxxx>

commit 070e76cb3ffe43f6855492e77c96680c562598f0 upstream.

There is a potential race when probing the TLB in TLBL/M/S exception
handlers for a matching entry. Between the time we hit a TLBL/S/M
exception and the time we get to execute the TLBP instruction, the
HTW may have replaced the TLB entry we are interested in hence the TLB
probe may fail. However, in the existing handlers, we never checked the
status of the TLBP (ie check the result in the C0/Index register). We
fix this by adding such a check when the core implements the HTW. If
we couldn't find a matching entry, we return back and try again.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@xxxxxxxxxx>
Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx>
Reviewed-by: James Hogan <james.hogan@xxxxxxxxxx>
Cc: linux-mips@xxxxxxxxxxxxxx
Patchwork: https://patchwork.linux-mips.org/patch/8599/
Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 arch/mips/mm/tlbex.c |   10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -1872,8 +1872,16 @@ build_r4000_tlbchange_handler_head(u32 *
 	uasm_l_smp_pgtable_change(l, *p);
 #endif
 	iPTE_LW(p, wr.r1, wr.r2); /* get even pte */
-	if (!m4kc_tlbp_war())
+	if (!m4kc_tlbp_war()) {
 		build_tlb_probe_entry(p);
+		if (cpu_has_htw) {
+			/* race condition happens, leaving */
+			uasm_i_ehb(p);
+			uasm_i_mfc0(p, wr.r3, C0_INDEX);
+			uasm_il_bltz(p, r, wr.r3, label_leave);
+			uasm_i_nop(p);
+		}
+	}
 	return wr;
 }
 


Patches currently in stable-queue which might be from Leonid.Yegoshin@xxxxxxxxxx are

queue-3.17/mips-tlbex-fix-potential-htw-race-on-tlbl-m-s-handlers.patch
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