This is a note to let you know that I've just added the patch titled
MIPS: r4kcache: Add EVA case for protected_writeback_dcache_line
to the 3.17-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
mips-r4kcache-add-eva-case-for-protected_writeback_dcache_line.patch
and it can be found in the queue-3.17 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From 83fd43449baaf88fe5c03dd0081a062041837c51 Mon Sep 17 00:00:00 2001
From: Markos Chandras <markos.chandras@xxxxxxxxxx>
Date: Wed, 5 Nov 2014 08:25:37 +0000
Subject: MIPS: r4kcache: Add EVA case for protected_writeback_dcache_line
From: Markos Chandras <markos.chandras@xxxxxxxxxx>
commit 83fd43449baaf88fe5c03dd0081a062041837c51 upstream.
Commit de8974e3f76c0 ("MIPS: asm: r4kcache: Add EVA cache flushing
functions") added cache function for EVA using the cachee instruction.
However, it didn't add a case for the protected_writeback_dcache_line.
mips_dsemul() calls r4k_flush_cache_sigtramp() which in turn uses
the protected_writeback_dcache_line() to flush the trampoline code
back to memory. This used the wrong "cache" instruction leading to
random userland crashes on non-FPU cores.
Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx>
Cc: linux-mips@xxxxxxxxxxxxxx
Patchwork: https://patchwork.linux-mips.org/patch/8331/
Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/mips/include/asm/r4kcache.h | 4 ++++
1 file changed, 4 insertions(+)
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -257,7 +257,11 @@ static inline void protected_flush_icach
*/
static inline void protected_writeback_dcache_line(unsigned long addr)
{
+#ifdef CONFIG_EVA
+ protected_cachee_op(Hit_Writeback_Inv_D, addr);
+#else
protected_cache_op(Hit_Writeback_Inv_D, addr);
+#endif
}
static inline void protected_writeback_scache_line(unsigned long addr)
Patches currently in stable-queue which might be from markos.chandras@xxxxxxxxxx are
queue-3.17/mips-asm-uaccess-add-v1-register-to-clobber-list-on-eva.patch
queue-3.17/mips-cpu-probe-set-the-ftlb-probability-bit-on-supported-cores.patch
queue-3.17/mips-lib-memcpy-restore-nop-on-delay-slot-before-returning-to-caller.patch
queue-3.17/mips-tlbex-fix-potential-htw-race-on-tlbl-m-s-handlers.patch
queue-3.17/mips-tlb-r4k-add-missing-htw-stop-start-sequences.patch
queue-3.17/mips-r4kcache-add-eva-case-for-protected_writeback_dcache_line.patch
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