On Thu, 2024-01-18 at 23:21 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> On HSW non-ULT (or at least on Dell Latitude E6540) external displays
> start to flicker when we enable PSR on the eDP. We observe a much
> higher
> SR and PC6 residency than should be possible with an external
> display,
> and indeen much higher than what we observe with eDP disabled and
> only the external display enabled. Looks like the hardware is somehow
> ignoring the fact that the external display is active during PSR.
>
> I wasn't able to redproduce this on my HSW ULT machine, or BDW.
> So either there's something specific about this particular laptop
> (eg. some unknown firmware thing) or the issue is limited to just
> non-ULT HSW systems. All known registers that could affect this
> look perfectly reasonable on the affected machine.
>
> As a workaround let's unmask the LPSP event to prevent PSR entry
> except while in LPSP mode (only pipe A + eDP active). This
> will prevent PSR entry entirely when multiple pipes are active.
> The one slight downside is that we now also prevent PSR entry
> when driving eDP with pipe B or C, but I think that's a reasonable
> tradeoff to avoid having to implement a more complex workaround.
>
> Cc: stable@xxxxxxxxxxxxxxx
> Fixes: 783d8b80871f ("drm/i915/psr: Re-enable PSR1 on hsw/bdw")
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10092
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Jouni Högander <jouni.hogander@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 14 ++++++++++++--
> 1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 696d5d32ca9d..1010b8c405df 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1544,8 +1544,18 @@ static void intel_psr_enable_source(struct
> intel_dp *intel_dp,
> * can rely on frontbuffer tracking.
> */
> mask = EDP_PSR_DEBUG_MASK_MEMUP |
> - EDP_PSR_DEBUG_MASK_HPD |
> - EDP_PSR_DEBUG_MASK_LPSP;
> + EDP_PSR_DEBUG_MASK_HPD;
> +
> + /*
> + * For some unknown reason on HSW non-ULT (or at least on
> + * Dell Latitude E6540) external displays start to flicker
> + * when PSR is enabled on the eDP. SR/PC6 residency is much
> + * higher than should be possible with an external display.
> + * As a workaround leave LPSP unmasked to prevent PSR entry
> + * when external displays are active.
> + */
> + if (DISPLAY_VER(dev_priv) >= 8 || IS_HASWELL_ULT(dev_priv))
> + mask |= EDP_PSR_DEBUG_MASK_LPSP;
>
> if (DISPLAY_VER(dev_priv) < 20)
> mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;
