On Fri, Jan 12, 2024 at 11:37:03PM +0100, Konrad Dybcio wrote:
> On 12.01.2024 16:59, Johan Hovold wrote:
> > On Fri, Jan 12, 2024 at 07:52:02PM +0530, Krishna chaitanya chundru wrote:
> >> CPU-PCIe path consits for registers PCIe BAR space, config space.
> >
> > consits?
> >
> >> As there is less access on this path compared to pcie to mem path
> >> add minimum vote i.e GEN1x1 bandwidth always.
> >
> > gen1 bandwidth can't be right.
> >
> >> In suspend remove the cpu vote after register space access is done.
> >>
> >> Fixes: c4860af88d0c ("PCI: qcom: Add basic interconnect support")
> >> cc: stable@xxxxxxxxxxxxxxx
> >
> > This does not look like a fix so drop the above.
> >
> > The commit you refer to explicitly left this path unconfigured for now
> > and only added support for the configuring the mem path as needed on
> > sc8280xp which otherwise would crash.
>
> I only sorta agree. I'd include a fixes tag but point it to either 8450
> addition or original driver introduction, as this is patching up a real
> hole (see my reply to Bryan).
Right, the above Fixes tag is not correct in any case.
And with a complete commit message it may be possible to tell whether
a Fixes tag is warranted or not.
Johan
