On 17 November 2014 18:49, James Hogan <james.hogan@xxxxxxxxxx> wrote: > Commit f1d2736c8156 (mmc: dw_mmc: control card read threshold) added > dw_mci_ctrl_rd_thld() with an unconditional write to the CDTHRCTL > register at offset 0x100. However before version 240a, the FIFO region > started at 0x100, so the write messes with the FIFO and completely > breaks the driver. > > If the version id < 240A, return early from dw_mci_ctl_rd_thld() so as > not to hit this problem. > > Fixes: f1d2736c8156 (mmc: dw_mmc: control card read threshold) > Signed-off-by: James Hogan <james.hogan@xxxxxxxxxx> > Cc: <stable@xxxxxxxxxxxxxxx> # v3.13+ > Cc: Seungwon Jeon <tgih.jun@xxxxxxxxxxx> > Cc: Jaehoon Chung <jh80.chung@xxxxxxxxxxx> > Cc: Chris Ball <chris@xxxxxxxxxx> > Cc: Ulf Hansson <ulf.hansson@xxxxxxxxxx> > Cc: linux-mmc@xxxxxxxxxxxxxxx Thanks! Applied for next and removing some of the Cc:s above, Kind regards Uffe > --- > Note I've completely guessed at 240A being the point where that register > was introduced since the FIFO region moved then. > --- > drivers/mmc/host/dw_mmc.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c > index 69f0cc68d5b2..f7c95abc8c11 100644 > --- a/drivers/mmc/host/dw_mmc.c > +++ b/drivers/mmc/host/dw_mmc.c > @@ -626,6 +626,13 @@ static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data) > > WARN_ON(!(data->flags & MMC_DATA_READ)); > > + /* > + * CDTHRCTL doesn't exist prior to 240A (in fact that register offset is > + * in the FIFO region, so we really shouldn't access it). > + */ > + if (host->verid < DW_MMC_240A) > + return; > + > if (host->timing != MMC_TIMING_MMC_HS200 && > host->timing != MMC_TIMING_UHS_SDR104) > goto disable; > -- > 2.0.4 > -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html