On Fri, 08 Dec 2023, Jani Nikula <jani.nikula@xxxxxxxxx> wrote: > Unless I'm completely misreading the bspec, there are no defined bits > for plane gtt fault errors in DE PIPE IIR for a display versions > 12-14. This would explain why DG2 in the linked bug is getting thousands > of fault errors. > > Bspec: 50335 > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9769 Okay, looking at the bug, this seems optimistic, but it might clear the ratelimited fault errors. > Fixes: 99e2d8bcb887 ("drm/i915/rkl: Limit number of universal planes to 5") > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> > Cc: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> > Cc: <stable@xxxxxxxxxxxxxxx> # v5.9+ > Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_display_irq.c | 4 +++- > drivers/gpu/drm/i915/i915_reg.h | 3 ++- > 2 files changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c > index f8ed53f30b2e..7bede5b56286 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c > @@ -834,7 +834,9 @@ static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv) > > static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv) > { > - if (DISPLAY_VER(dev_priv) >= 13 || HAS_D12_PLANE_MINIMIZATION(dev_priv)) > + if (DISPLAY_VER(dev_priv) >= 14) > + return MTL_DE_PIPE_IRQ_FAULT_ERRORS; > + else if (DISPLAY_VER(dev_priv) >= 12) > return RKL_DE_PIPE_IRQ_FAULT_ERRORS; > else if (DISPLAY_VER(dev_priv) >= 11) > return GEN11_DE_PIPE_IRQ_FAULT_ERRORS; > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 27dc903f0553..fcf980694cb4 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4354,7 +4354,8 @@ > GEN11_PIPE_PLANE7_FAULT | \ > GEN11_PIPE_PLANE6_FAULT | \ > GEN11_PIPE_PLANE5_FAULT) > -#define RKL_DE_PIPE_IRQ_FAULT_ERRORS \ > +#define RKL_DE_PIPE_IRQ_FAULT_ERRORS 0 > +#define MTL_DE_PIPE_IRQ_FAULT_ERRORS \ > (GEN9_DE_PIPE_IRQ_FAULT_ERRORS | \ > GEN11_PIPE_PLANE5_FAULT) -- Jani Nikula, Intel
