Patch "drm/radeon: set correct CE ram size for CIK" has been added to the 3.17-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/radeon: set correct CE ram size for CIK

to the 3.17-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-radeon-set-correct-ce-ram-size-for-cik.patch
and it can be found in the queue-3.17 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From dc4edad6530a9b7b66c3d905e2bc06021a05dcad Mon Sep 17 00:00:00 2001
From: Jammy Zhou <Jammy.Zhou@xxxxxxx>
Date: Mon, 3 Nov 2014 08:58:20 -0500
Subject: drm/radeon: set correct CE ram size for CIK

From: Jammy Zhou <Jammy.Zhou@xxxxxxx>

commit dc4edad6530a9b7b66c3d905e2bc06021a05dcad upstream.

CE ram size is 32k/0k/0k for GFX/CS0/CS1 with CIK

Ported from amdgpu driver.

Signed-off-by: Jammy Zhou <Jammy.Zhou@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 drivers/gpu/drm/radeon/cik.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -4315,8 +4315,8 @@ static int cik_cp_gfx_start(struct radeo
 	/* init the CE partitions.  CE only used for gfx on CIK */
 	radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
 	radeon_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));
-	radeon_ring_write(ring, 0xc000);
-	radeon_ring_write(ring, 0xc000);
+	radeon_ring_write(ring, 0x8000);
+	radeon_ring_write(ring, 0x8000);
 
 	/* setup clear context state */
 	radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));


Patches currently in stable-queue which might be from Jammy.Zhou@xxxxxxx are

queue-3.17/drm-radeon-set-correct-ce-ram-size-for-cik.patch
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