On Wed, Nov 22, 2023 at 09:43:55AM -0600, Mario Limonciello wrote: > On 11/22/2023 00:03, Mika Westerberg wrote: > > Hi, > > > > On Wed, Nov 22, 2023 at 10:36:39AM +0530, Sanath S wrote: > > > Boot firmware on AMD's Yellow Carp and Pink Sardine allocates > > > very minimal buses for PCIe downstream ports. This results in > > > failure to extend the daisy chain. > > > > > > Add quirk to reset the downstream port to help reset the topology > > > created by boot firmware. > > > > But this resets the USB4 side of ports, how does this help with the PCIe > > side? Or this also resets the PCIe side? Please add this information to > > the changelog too. > > IIUC the PCIe side will be implicitly reset as well. > > > > > I suppose it is not possible to fix the boot firmware? > > It's a really difficult case to make with firmware team. Windows and Linux > have a different behavior here. The Windows CM doesn't take the existing > tunnels from firmware and instead always resets them. > So Windows "isn't affected" by this problem. > > Furthermore there are already lots of systems out "in the wild" as these are > already both production silicon with shipping OEM products. Yeah that's what I was afraid :( Okay we've been there before so let's work it around in the kernel then.
