Hi Laurent, Alexander,
On Thu, Nov 02, 2023 at 10:24:30AM +0200, Laurent Pinchart wrote:
> Hi Alexander,
>
> On Thu, Nov 02, 2023 at 08:55:01AM +0100, Alexander Stein wrote:
> > Am Donnerstag, 2. November 2023, 02:22:17 CET schrieb Laurent Pinchart:
> > > On Wed, Nov 01, 2023 at 01:23:53PM +0100, Alexander Stein wrote:
> > > > Some sensors, e.g. Sony, are using little-endian registers. Add support
> > > > for
> > >
> > > I would write Sony IMX290 here, as there are Sony sensors that use big
> > > endian.
> > >
> > > > those by encoding the endianess into Bit 20 of the register address.
> > > >
> > > > Fixes: af73323b97702 ("media: imx290: Convert to new CCI register access
> > > > helpers") Cc: stable@xxxxxxxxxxxxxxx
> > > > Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
> > > > ---
> > > >
> > > > drivers/media/v4l2-core/v4l2-cci.c | 44 ++++++++++++++++++++++++------
> > > > include/media/v4l2-cci.h | 5 ++++
> > > > 2 files changed, 41 insertions(+), 8 deletions(-)
>
> [snip]
>
> > > > diff --git a/include/media/v4l2-cci.h b/include/media/v4l2-cci.h
> > > > index 0f6803e4b17e9..ef3faf0c9d44d 100644
> > > > --- a/include/media/v4l2-cci.h
> > > > +++ b/include/media/v4l2-cci.h
> > > > @@ -32,12 +32,17 @@ struct cci_reg_sequence {
> > > > #define CCI_REG_ADDR_MASK GENMASK(15, 0)
> > > > #define CCI_REG_WIDTH_SHIFT 16
> > > > #define CCI_REG_WIDTH_MASK GENMASK(19, 16)
> > > > +#define CCI_REG_LE BIT(20)
> > > >
> > > > #define CCI_REG8(x) ((1 << CCI_REG_WIDTH_SHIFT) | (x))
> > > > #define CCI_REG16(x) ((2 << CCI_REG_WIDTH_SHIFT) | (x))
> > > > #define CCI_REG24(x) ((3 << CCI_REG_WIDTH_SHIFT) | (x))
> > > > #define CCI_REG32(x) ((4 << CCI_REG_WIDTH_SHIFT) | (x))
> > > > #define CCI_REG64(x) ((8 << CCI_REG_WIDTH_SHIFT) | (x))
> > > > +#define CCI_REG16_LE(x) ((2 << CCI_REG_WIDTH_SHIFT) | (x) | CCI_REG_LE)
> > > > +#define CCI_REG24_LE(x) ((3 << CCI_REG_WIDTH_SHIFT) | (x) | CCI_REG_LE)
> > > > +#define CCI_REG32_LE(x) ((4 << CCI_REG_WIDTH_SHIFT) | (x) | CCI_REG_LE)
> > > > +#define CCI_REG64_LE(x) ((8 << CCI_REG_WIDTH_SHIFT) | (x) | CCI_REG_LE)
> > >
> > > I would put CCI_REG_LE first, to match the bits order.
> >
> > You mean this order?
> >
> > CCI_REG8(x)
> > CCI_REG16_LE(x)
> > CCI_REG16(x)
> > CCI_REG24_LE(x)
> > CCI_REG24(x)
> > CCI_REG32_LE(x)
> > CCI_REG32(x)
> > CCI_REG64_LE(x)
> > CCI_REG64(x)
> >
> > I would either keep the _LE variants at the bottom or below to their big-
> > endian counterpart. I prefer readability thus I would put the _LE at the
> > bottom, also it aligns nicely with the additional bit set.
>
> No, I meant
>
> #define CCI_REG16_LE(x) (CCI_REG_LE | (2 << CCI_REG_WIDTH_SHIFT) | (x))
> #define CCI_REG24_LE(x) (CCI_REG_LE | (3 << CCI_REG_WIDTH_SHIFT) | (x))
> #define CCI_REG32_LE(x) (CCI_REG_LE | (4 << CCI_REG_WIDTH_SHIFT) | (x))
> #define CCI_REG64_LE(x) (CCI_REG_LE | (8 << CCI_REG_WIDTH_SHIFT) | (x))
Ideally these numbers would be unsigned, i.e.
#define CCI_REG16_LE(x) (CCI_REG_LE | (2U << CCI_REG_WIDTH_SHIFT) | (x))
#define CCI_REG24_LE(x) (CCI_REG_LE | (3U << CCI_REG_WIDTH_SHIFT) | (x))
#define CCI_REG32_LE(x) (CCI_REG_LE | (4U << CCI_REG_WIDTH_SHIFT) | (x))
#define CCI_REG64_LE(x) (CCI_REG_LE | (8U << CCI_REG_WIDTH_SHIFT) | (x))
This is a pre-existing problem. Feel free to add a patch to address it. :-)
--
Kind regards,
Sakari Ailus
