6.5-stable review patch. If anyone has any objections, please let me know.
------------------
From: Johan Hovold <johan+linaro@xxxxxxxxxx>
commit 66af5339d4f8e20c6d89a490570bd94d40f1a7f6 upstream.
Drivers that enable runtime PM must make sure that the controller is
runtime resumed before accessing its registers to prevent the power
domain from being disabled.
Fixes: 4ab43d171181 ("clk: qcom: Add lpass clock controller driver for SC7280")
Cc: stable@xxxxxxxxxxxxxxx # 5.16
Cc: Taniya Das <quic_tdas@xxxxxxxxxxx>
Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20230718132902.21430-6-johan+linaro@xxxxxxxxxx
Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/clk/qcom/lpasscc-sc7280.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
--- a/drivers/clk/qcom/lpasscc-sc7280.c
+++ b/drivers/clk/qcom/lpasscc-sc7280.c
@@ -118,9 +118,13 @@ static int lpass_cc_sc7280_probe(struct
ret = pm_clk_add(&pdev->dev, "iface");
if (ret < 0) {
dev_err(&pdev->dev, "failed to acquire iface clock\n");
- goto destroy_pm_clk;
+ goto err_destroy_pm_clk;
}
+ ret = pm_runtime_resume_and_get(&pdev->dev);
+ if (ret)
+ goto err_destroy_pm_clk;
+
if (!of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode")) {
lpass_regmap_config.name = "qdsp6ss";
lpass_regmap_config.max_register = 0x3f;
@@ -128,7 +132,7 @@ static int lpass_cc_sc7280_probe(struct
ret = qcom_cc_probe_by_index(pdev, 0, desc);
if (ret)
- goto destroy_pm_clk;
+ goto err_put_rpm;
}
lpass_regmap_config.name = "top_cc";
@@ -137,11 +141,15 @@ static int lpass_cc_sc7280_probe(struct
ret = qcom_cc_probe_by_index(pdev, 1, desc);
if (ret)
- goto destroy_pm_clk;
+ goto err_put_rpm;
+
+ pm_runtime_put(&pdev->dev);
return 0;
-destroy_pm_clk:
+err_put_rpm:
+ pm_runtime_put_sync(&pdev->dev);
+err_destroy_pm_clk:
pm_clk_destroy(&pdev->dev);
return ret;
