On Wed, 13 Sept 2023 at 20:57, Bean Huo <beanhuo@xxxxxxxx> wrote:
>
> From: Bean Huo <beanhuo@xxxxxxxxxx>
>
> Micron MTFC4GACAJCN eMMC supports cache but requires that flush cache
> operation be allowed only after a write has occurred. Otherwise, the
> cache flush command or subsequent commands will time out.
This needs some more explanation I think. What does "after a write" really mean?
According to the changes below, we are tracking only whether a write
has been done and then we set host->card->written_flag = true - keep
it like that forever.
What happens beyond a power cycle for example? Like in the recovery
path or in the system wide suspend/resume path? Does the flag need to
be reset in those cases too?
Kind regards
Uffe
>
> Signed-off-by: Bean Huo <beanhuo@xxxxxxxxxx>
> Cc: stable@xxxxxxxxxxxxxxx
> ---
> drivers/mmc/core/core.c | 6 ++++++
> drivers/mmc/core/mmc.c | 5 +++++
> drivers/mmc/core/quirks.h | 7 ++++---
> include/linux/mmc/card.h | 2 ++
> 4 files changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
> index 3d3e0ca52614..5f858eb5f62c 100644
> --- a/drivers/mmc/core/core.c
> +++ b/drivers/mmc/core/core.c
> @@ -259,6 +259,12 @@ static void __mmc_start_request(struct mmc_host *host, struct mmc_request *mrq)
> host->cqe_ops->cqe_off(host);
>
> host->ops->request(host, mrq);
> +
> + if (host->card->quirks & MMC_QUIRK_BROKEN_CACHE_FLUSH && !host->card->written_flag) {
> + if (mrq->cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK ||
> + mrq->cmd->opcode == MMC_WRITE_BLOCK)
> + host->card->written_flag = true;
> + }
> }
>
> static void mmc_mrq_pr_debug(struct mmc_host *host, struct mmc_request *mrq,
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index 89cd48fcec79..a2edd065fa1b 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -1929,6 +1929,8 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
> if (!oldcard)
> host->card = card;
>
> + card->written_flag = false;
> +
> return 0;
>
> free_card:
> @@ -2081,6 +2083,9 @@ static int _mmc_flush_cache(struct mmc_host *host)
> {
> int err = 0;
>
> + if (host->card->quirks & MMC_QUIRK_BROKEN_CACHE_FLUSH && !host->card->written_flag)
> + return err;
> +
> if (_mmc_cache_enabled(host)) {
> err = mmc_switch(host->card, EXT_CSD_CMD_SET_NORMAL,
> EXT_CSD_FLUSH_CACHE, 1,
> diff --git a/drivers/mmc/core/quirks.h b/drivers/mmc/core/quirks.h
> index 32b64b564fb1..5e68c8b4cdca 100644
> --- a/drivers/mmc/core/quirks.h
> +++ b/drivers/mmc/core/quirks.h
> @@ -110,11 +110,12 @@ static const struct mmc_fixup __maybe_unused mmc_blk_fixups[] = {
> MMC_QUIRK_TRIM_BROKEN),
>
> /*
> - * Micron MTFC4GACAJCN-1M advertises TRIM but it does not seems to
> - * support being used to offload WRITE_ZEROES.
> + * Micron MTFC4GACAJCN-1M supports TRIM but does not appear to suppor
> + * WRITE_ZEROES offloading. It also supports caching, but the cache can
> + * only be flushed after a write has occurred.
> */
> MMC_FIXUP("Q2J54A", CID_MANFID_MICRON, 0x014e, add_quirk_mmc,
> - MMC_QUIRK_TRIM_BROKEN),
> + MMC_QUIRK_TRIM_BROKEN | MMC_QUIRK_BROKEN_CACHE_FLUSH),
>
> /*
> * Kingston EMMC04G-M627 advertises TRIM but it does not seems to
> diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
> index daa2f40d9ce6..7b12eebc5586 100644
> --- a/include/linux/mmc/card.h
> +++ b/include/linux/mmc/card.h
> @@ -295,7 +295,9 @@ struct mmc_card {
> #define MMC_QUIRK_BROKEN_HPI (1<<13) /* Disable broken HPI support */
> #define MMC_QUIRK_BROKEN_SD_DISCARD (1<<14) /* Disable broken SD discard support */
> #define MMC_QUIRK_BROKEN_SD_CACHE (1<<15) /* Disable broken SD cache support */
> +#define MMC_QUIRK_BROKEN_CACHE_FLUSH (1<<16) /* Don't flush cache until the write has occurred */
>
> + bool written_flag; /* Indicates eMMC has been written since power on */
> bool reenable_cmdq; /* Re-enable Command Queue */
>
> unsigned int erase_size; /* erase size in sectors */
> --
> 2.34.1
>
