This is a note to let you know that I've just added the patch titled
MIPS: cp1emu: Fix ISA restrictions for cop1x_op instructions
to the 3.17-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
mips-cp1emu-fix-isa-restrictions-for-cop1x_op-instructions.patch
and it can be found in the queue-3.17 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From a5466d7bba9af83a82cc7c081b2a7d557cde3204 Mon Sep 17 00:00:00 2001
From: Markos Chandras <markos.chandras@xxxxxxxxxx>
Date: Tue, 21 Oct 2014 10:21:54 +0100
Subject: MIPS: cp1emu: Fix ISA restrictions for cop1x_op instructions
From: Markos Chandras <markos.chandras@xxxxxxxxxx>
commit a5466d7bba9af83a82cc7c081b2a7d557cde3204 upstream.
Commit 08a07904e1828 ("MIPS: math-emu: Remove most ifdefery") removed
the #ifdef ISA conditions and switched to runtime detection. However,
according to the instruction set manual, the cop1x_op instructions are
available in >=MIPS32r2 as well. This fixes a problem on MIPS32r2
with the ntpd package which failed to execute with a SIGILL exit code due
to the fact that a madd.d instruction was not being emulated.
Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx>
Fixes: 08a07904e1828 ("MIPS: math-emu: Remove most ifdefery")
Cc: linux-mips@xxxxxxxxxxxxxx
Reviewed-by: Paul Burton <paul.burton@xxxxxxxxxx>
Reviewed-by: James Hogan <james.hogan@xxxxxxxxxx>
Cc: Markos Chandras <markos.chandras@xxxxxxxxxx>
Patchwork: https://patchwork.linux-mips.org/patch/8173/
Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/mips/math-emu/cp1emu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -1023,7 +1023,7 @@ emul:
goto emul;
case cop1x_op:
- if (cpu_has_mips_4_5 || cpu_has_mips64)
+ if (cpu_has_mips_4_5 || cpu_has_mips64 || cpu_has_mips32r2)
/* its one of ours */
goto emul;
@@ -1068,7 +1068,7 @@ emul:
break;
case cop1x_op:
- if (!cpu_has_mips_4_5 && !cpu_has_mips64)
+ if (!cpu_has_mips_4_5 && !cpu_has_mips64 && !cpu_has_mips32r2)
return SIGILL;
sig = fpux_emu(xcp, ctx, ir, fault_addr);
Patches currently in stable-queue which might be from markos.chandras@xxxxxxxxxx are
queue-3.17/mips-ftrace-fix-a-micromips-build-problem.patch
queue-3.17/mips-cp1emu-fix-isa-restrictions-for-cop1x_op-instructions.patch
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