On 7/17/2023 7:09 PM, Greg KH wrote:
On Mon, Jul 17, 2023 at 12:25:35PM +0530, Sricharan Ramabadhran wrote:
PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for IPQ8074
2_3_3 post_init ops. PCIe slave addr size was initially set
to 0x358, but was wrongly changed to 0x168 as a part of
commit 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from
register definitions"). Fixing it, by using the right macro
PARF_SLV_ADDR_SPACE_SIZE and remove the unused
PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
Note, you do have a full 72 columns to use, no need to make it smaller.
ok sure
Without this pcie bring up on IPQ8074 is broken now.
I do not understand, something that used to work now breaks, or this is
preventing a new chip from being "brought up"?
yes, ipq8074 pcie which was previously working is broken now.
This patch fixes it.
Regards,
Sricharan
