On 22-06-2023 17:43, Mark Brown wrote:
On Thu, Jun 22, 2023 at 05:04:15PM +0530, Sameer Pujar wrote:From: Sheetal <sheetal@xxxxxxxxxx> I2S data sanity tests fail beyond a bit clock frequency of 6.144MHz. This happens because the AHUB clock rate is too low and it shows 9.83MHz on boot. The maximum rate of PLLA_OUT0 is 49.152MHz and is used to serve I/O clocks. It is recommended that AHUB clock operates higher than this. Thus fix this by using PLLP_OUT0 as parent clock for AHUB instead of PLLA_OUT0 and fix the rate to 81.6MHz. Fixes: dc94a94daa39 ("arm64: tegra: Add audio devices on Tegra234") Cc: stable@xxxxxxxxxxxxxxx Signed-off-by: Sheetal <sheetal@xxxxxxxxxx>Fixes should come before cleanups in a patch series to ensure that they can be applied and sent as fixes without dependencies on non-fixes.
I sorted the series based on the subsystem. Will make sure to put 'fixes' patch always first. Thanks.
