On Wed, May 17, 2023 at 11:58:59AM +0530, Manivannan Sadhasivam wrote:
> The LLCC EDAC register offsets varies between each SoC. Hardcoding the
> register offsets won't work and will often result in crash due to
> accessing the wrong locations.
>
> Hence, get the register offsets from the LLCC driver matching the
> individual SoCs.
>
> Cc: <stable@xxxxxxxxxxxxxxx> # 6.0: 5365cea199c7 ("soc: qcom: llcc: Rename reg_offset structs to reflect LLCC version")
> Cc: <stable@xxxxxxxxxxxxxxx> # 6.0: c13d7d261e36 ("soc: qcom: llcc: Pass LLCC version based register offsets to EDAC driver")
> Cc: <stable@xxxxxxxxxxxxxxx> # 6.0
> Fixes: a6e9d7ef252c ("soc: qcom: llcc: Add configuration data for SM8450 SoC")
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> ---
> drivers/edac/qcom_edac.c | 116 ++++++++++++++---------------
> include/linux/soc/qcom/llcc-qcom.h | 6 --
> 2 files changed, 58 insertions(+), 64 deletions(-)
In case Bjorn wants to pick this up:
Acked-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>
Thx.
--
Regards/Gruss,
Boris.
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