Re: All stable branches: apply fc96ec826bce ("spi: fsl-cpm: Use 16 bit mode for large transfers with even size")

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Le 15/05/2023 à 14:33, Greg Kroah-Hartman a écrit :
> On Mon, May 15, 2023 at 12:29:51PM +0000, Christophe Leroy wrote:
>>
>>
>> Le 15/05/2023 à 14:18, Greg Kroah-Hartman a écrit :
>>> On Sun, May 14, 2023 at 09:17:08AM +0000, Christophe Leroy wrote:
>>>> Hello,
>>>>
>>>> In addition to c20c57d9868d ("spi: fsl-spi: Fix CPM/QE mode Litte
>>>> Endian") that you already applied to all stable branches, could you
>>>> please also apply:
>>>>
>>>> 8a5299a1278e ("spi: fsl-spi: Re-organise transfer bits_per_word adaptation")
>>>> fc96ec826bce ("spi: fsl-cpm: Use 16 bit mode for large transfers with
>>>> even size")
>>>>
>>>> For 4.14 and 4.19, as prerequisit you will also need
>>>>
>>>> af0e6242909c ("spi: spi-fsl-spi: automatically adapt bits-per-word in
>>>> cpu mode")
>>>
>>> That commit did not apply to 4.14 or 4.19, so I did not apply any of
>>> these to those queues.  Please provide working backports for those trees
>>> if you wish to see them there.
>>>
>>
>> That's strange. It does apply cleanly with 'git cherry-pick':
>>
>> $ git reset --hard v4.14.314
>> HEAD is now at 9bbf62a71963 Linux 4.14.314
>>
>> $ git cherry-pick af0e6242909c
>> Auto-merging drivers/spi/spi-fsl-spi.c
>> [detached HEAD 0923539dff2f] spi: spi-fsl-spi: automatically adapt
>> bits-per-word in cpu mode
>>    Author: Rasmus Villemoes <rasmus.villemoes@xxxxxxxxx>
>>    Date: Wed Mar 27 14:30:52 2019 +0000
>>    1 file changed, 16 insertions(+)
>>
>> I can send the result of the cherry-pick if it helps.
> 
> Odds are it will break the build, given that it did so for 5.4, 5.10,
> and 5.15, so please, send a backported, tested, set of patches and I
> will be glad to queue them up.
> 

Oops, I forgot to build things when changes applied cleanly without 
conflict. My mistake.

I have resent it backported.

For you information, the problem was that we were missing the below 
change, brought upstream by commit 3b553e0041a6 ("spi: fsl_spi: Don't 
change speed while chipselect is active")

diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c
index 1bad0ceac81b..8dd6fb36710c 100644
--- a/drivers/spi/spi-fsl-spi.c
+++ b/drivers/spi/spi-fsl-spi.c
@@ -370,8 +370,8 @@ static int fsl_spi_do_one_msg(struct spi_master *master,
          * In CPU mode, optimize large byte transfers to use larger
          * bits_per_word values to reduce number of interrupts taken.
          */
-       if (!(mpc8xxx_spi->flags & SPI_CPM_MODE)) {
-               list_for_each_entry(t, &m->transfers, transfer_list) {
+       list_for_each_entry(t, &m->transfers, transfer_list) {
+               if (!(mpc8xxx_spi->flags & SPI_CPM_MODE)) {
                         if (t->len < 256 || t->bits_per_word != 8)
                                 continue;
                         if ((t->len & 3) == 0)





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