From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
commit 163bfb0cb1f6fbf961cf912cbde57399ea1ae0e8 upstream.
As per Hardware Programming Guide, when configuring pin as output,
set the pin value before setting output-enable (OE). Similar approach
is in main SoC TLMM pin controller.
Cc: <stable@xxxxxxxxxxxxxxx>
Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20230309154949.658380-1-krzysztof.kozlowski@xxxxxxxxxx
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
--- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
+++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
@@ -216,6 +216,15 @@ static int lpi_config_set(struct pinctrl
}
}
+ /*
+ * As per Hardware Programming Guide, when configuring pin as output,
+ * set the pin value before setting output-enable (OE).
+ */
+ if (output_enabled) {
+ val = u32_encode_bits(value ? 1 : 0, LPI_GPIO_VALUE_OUT_MASK);
+ lpi_gpio_write(pctrl, group, LPI_GPIO_VALUE_REG, val);
+ }
+
val = lpi_gpio_read(pctrl, group, LPI_GPIO_CFG_REG);
u32p_replace_bits(&val, pullup, LPI_GPIO_PULL_MASK);
@@ -225,11 +234,6 @@ static int lpi_config_set(struct pinctrl
lpi_gpio_write(pctrl, group, LPI_GPIO_CFG_REG, val);
- if (output_enabled) {
- val = u32_encode_bits(value ? 1 : 0, LPI_GPIO_VALUE_OUT_MASK);
- lpi_gpio_write(pctrl, group, LPI_GPIO_VALUE_REG, val);
- }
-
return 0;
}
