Re: [RESEND PATCH 5.15 v3 5/5] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

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Hi!

> On Tue, Apr 11, 2023 at 11:52:20AM -0400, William Breathitt Gray wrote:
> > commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.
> > 
> > The Counter (CNTR) register is 24 bits wide, but we can have an
> > effective 25-bit count value by setting bit 24 to the XOR of the Borrow
> > flag and Carry flag. The flags can be read from the FLAG register, but a
> > race condition exists: the Borrow flag and Carry flag are instantaneous
> > and could change by the time the count value is read from the CNTR
> > register.

> > Since the race condition could result in an incorrect 25-bit count
> > value, remove support for 25-bit count values from this driver.

I believe usual solution is to read the carry, read the counter, and
read the carry again. If old_carry = new_carry, we are pretty sure we
did not hit the race, and can use 25 bit value.

Best regards,
									Pavel
-- 
People of Russia, stop Putin before his war on Ukraine escalates.

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