The following commit has been merged into the irq/irqchip-next branch of irqchip: Commit-ID: c84efbba46901b187994558ee0edb15f7076c9a7 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/c84efbba46901b187994558ee0edb15f7076c9a7 Author: Jianmin Lv <lvjianmin@xxxxxxxxxxx> AuthorDate: Fri, 07 Apr 2023 16:34:52 +08:00 Committer: Marc Zyngier <maz@xxxxxxxxxx> CommitterDate: Sat, 08 Apr 2023 11:29:18 +01:00 irqchip/loongson-pch-pic: Fix registration of syscore_ops When support suspend/resume for loongson-pch-pic, the syscore_ops is registered twice in dual-bridges machines where there are two pch-pic IRQ domains. Repeated registration of an same syscore_ops broke syscore_ops_list, so the patch will corret it. Fixes: 1ed008a2c331 ("irqchip/loongson-pch-pic: Add suspend/resume support") Cc: stable@xxxxxxxxxxxxxxx Signed-off-by: Jianmin Lv <lvjianmin@xxxxxxxxxxx> Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx> Link: https://lore.kernel.org/r/20230407083453.6305-5-lvjianmin@xxxxxxxxxxx --- drivers/irqchip/irq-loongson-pch-pic.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c index 437f1af..64fa67d 100644 --- a/drivers/irqchip/irq-loongson-pch-pic.c +++ b/drivers/irqchip/irq-loongson-pch-pic.c @@ -311,7 +311,8 @@ static int pch_pic_init(phys_addr_t addr, unsigned long size, int vec_base, pch_pic_handle[nr_pics] = domain_handle; pch_pic_priv[nr_pics++] = priv; - register_syscore_ops(&pch_pic_syscore_ops); + if (nr_pics == 1) + register_syscore_ops(&pch_pic_syscore_ops); return 0;