Hey Greg, On Wed, Mar 15, 2023 at 01:13:35PM +0100, Greg Kroah-Hartman wrote: > From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > > [ Upstream commit 99e2266f2460e5778560f81982b6301dd2a16502 ] > > While the current list of rules may have been accurate when created > it now lacks some clarity in the face of isa-manual updates. Instead of > trying to continuously align this rule-set with the one in the > specifications, change the role of this comment. > > This particular comment is important, as the array it "decorates" > defines the order in which the ISA string appears to userspace in > /proc/cpuinfo. > > Re-jig and strengthen the wording to provide contributors with a set > order in which to add entries & note why this particular struct needs > more attention than others. > > While in the area, add some whitespace and tweak some wording for > readability's sake. > > Suggested-by: Andrew Jones <ajones@xxxxxxxxxxxxxxxx> > Reviewed-by: Andrew Jones <ajones@xxxxxxxxxxxxxxxx> > Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > Link: https://lore.kernel.org/r/20221205144525.2148448-2-conor.dooley@xxxxxxxxxxxxx > Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx> > Stable-dep-of: 1eac28201ac0 ("RISC-V: fix ordering of Zbb extension") I've been sick for the last week, and am not 100% sure what I did and did not reply to stable selection emails for, but I'm pretty sure that I did say that the ZBB stuff was a 6.3 feature and the order fix should not be backported. I'm not sure that I understand how this comment rework is a stable dependency of that backport either, but this should be dropped. Apologies if I missed a selection email for this one while I've been sick, but I was sick after all... Cheers, Conor. > Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> > --- > arch/riscv/kernel/cpu.c | 49 ++++++++++++++++++++++++++++++----------- > 1 file changed, 36 insertions(+), 13 deletions(-) > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index 1b9a5a66e55ab..db8b16ad9342b 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -144,22 +144,45 @@ arch_initcall(riscv_cpuinfo_init); > .uprop = #UPROP, \ > .isa_ext_id = EXTID, \ > } > + > /* > - * Here are the ordering rules of extension naming defined by RISC-V > - * specification : > - * 1. All extensions should be separated from other multi-letter extensions > - * by an underscore. > - * 2. The first letter following the 'Z' conventionally indicates the most > + * The canonical order of ISA extension names in the ISA string is defined in > + * chapter 27 of the unprivileged specification. > + * > + * Ordinarily, for in-kernel data structures, this order is unimportant but > + * isa_ext_arr defines the order of the ISA string in /proc/cpuinfo. > + * > + * The specification uses vague wording, such as should, when it comes to > + * ordering, so for our purposes the following rules apply: > + * > + * 1. All multi-letter extensions must be separated from other extensions by an > + * underscore. > + * > + * 2. Additional standard extensions (starting with 'Z') must be sorted after > + * single-letter extensions and before any higher-privileged extensions. > + > + * 3. The first letter following the 'Z' conventionally indicates the most > * closely related alphabetical extension category, IMAFDQLCBKJTPVH. > - * If multiple 'Z' extensions are named, they should be ordered first > - * by category, then alphabetically within a category. > - * 3. Standard supervisor-level extensions (starts with 'S') should be > - * listed after standard unprivileged extensions. If multiple > - * supervisor-level extensions are listed, they should be ordered > + * If multiple 'Z' extensions are named, they must be ordered first by > + * category, then alphabetically within a category. > + * > + * 3. Standard supervisor-level extensions (starting with 'S') must be listed > + * after standard unprivileged extensions. If multiple supervisor-level > + * extensions are listed, they must be ordered alphabetically. > + * > + * 4. Standard machine-level extensions (starting with 'Zxm') must be listed > + * after any lower-privileged, standard extensions. If multiple > + * machine-level extensions are listed, they must be ordered > * alphabetically. > - * 4. Non-standard extensions (starts with 'X') must be listed after all > - * standard extensions. They must be separated from other multi-letter > - * extensions by an underscore. > + * > + * 5. Non-standard extensions (starting with 'X') must be listed after all > + * standard extensions. If multiple non-standard extensions are listed, they > + * must be ordered alphabetically. > + * > + * An example string following the order is: > + * rv64imadc_zifoo_zigoo_zafoo_sbar_scar_zxmbaz_xqux_xrux > + * > + * New entries to this struct should follow the ordering rules described above. > */ > static struct riscv_isa_ext_data isa_ext_arr[] = { > __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF), > -- > 2.39.2 > > >
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