Am Montag, den 22.09.2014, 17:01 +0800 schrieb Richard Zhu:
> - enable pcie support on imx6qdl sabresd and asbreauto boards.
> - sabresd board has the pcie power on and reset gpios, but
> sabreauto doesn't have these two gpios.
>
> Signed-off-by: Richard Zhu <r65037@xxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 4 ++++
> arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 2 ++
> 2 files changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> index 009abd6..d6040a5 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> @@ -410,6 +410,10 @@
> };
> };
>
> +&pcie {
> + status = "okay";
> +};
> +
> &pwm3 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pwm3>;
> diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> index ec43dde..c2d3224 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> @@ -396,6 +396,7 @@
>
> pinctrl_pcie: pciegrp {
> fsl,pins = <
> + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
> MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
> >;
> };
> @@ -502,6 +503,7 @@
> &pcie {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie>;
> + power-on-gpio = <&gpio3 19 0>;
> reset-gpio = <&gpio7 12 0>;
> status = "okay";
> };
This hunk is wrong. There is no "power-on-gpio" in the binding anymore.
Also there is already a change in Shawns tree to model this as a
always-on regulator. If we really want to control pci bus power this
needs to be done through this regulator, not some arbitrary gpio hack.
Also I don't see why this would be stable material.
Regards,
Lucas
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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