The patch below does not apply to the 5.15-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@xxxxxxxxxxxxxxx>.
Possible dependencies:
7a7d86d14d07 ("phy: qcom-qmp-combo: fix broken power on")
d4b81490fe44 ("phy: qcom-qmp-combo: drop start and pwrdn-ctrl abstraction")
f7075f4905e7 ("phy: qcom-qmp-combo: clean up status polling")
acfee73b635b ("phy: qcom-qmp-combo: drop power-down delay config")
d71eb7083e5e ("phy: qcom-qmp-combo: drop sc8280xp power-down delay")
2e52ddf045a0 ("phy: qcom-qmp-combo: clean up power-down handling")
9d943961912c ("phy: qcom-qmp-combo: drop redundant DP config flag")
099155615ac2 ("phy: qcom-qmp-combo: consolidate lane config")
f5d6b5d613e9 ("phy: qcom-qmp-combo: fix sc8280xp PCS_USB offset")
064bbdba4f8d ("phy: qcom-qmp-combo: drop unused legacy DT workaround")
2de8a325b108 ("phy: qcom-qmp-combo: fix memleak on probe deferral")
e5cedefa7203 ("phy: qcom-qmp-combo: shorten function prefixes")
beee6ed1d63f ("phy: qcom-qmp-combo: drop unused defines")
ac439ce88edf ("phy: qcom-qmp: drop dual-lane comments")
a2e927b0e50d ("phy: qcom-qmp-combo: Add sc8280xp USB/DP combo phys")
c0c7769cdae2 ("phy: qcom-qmp: Add SC8280XP USB3 UNI phy")
712e5dffe911 ("phy: qcom-qmp-combo: Parameterize swing and pre_emphasis tables")
d88497fb6bbd ("phy: qualcomm: phy-qcom-qmp: add support for combo USB3+DP phy on SDM845")
5fc21d1bd3d7 ("phy: qcom-qmp: split allegedly 4.20 and 5.20 TX/RX registers")
87d71378c61a ("phy: qcom-qmp: move PCIE QHP registers to separate header")
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
>From 7a7d86d14d073dfa3429c550667a8e78b99edbd4 Mon Sep 17 00:00:00 2001
From: Johan Hovold <johan+linaro@xxxxxxxxxx>
Date: Mon, 14 Nov 2022 09:13:44 +0100
Subject: [PATCH] phy: qcom-qmp-combo: fix broken power on
The PHY is powered on during phy-init by setting the SW_PWRDN bit in the
COM_POWER_DOWN_CTRL register and then setting the same bit in the in the
PCS_POWER_DOWN_CONTROL register that belongs to the USB part of the
PHY.
Currently, whether power on succeeds depends on probe order and having
the USB part of the PHY be initialised first. In case the DP part of the
PHY is instead initialised first, the intended power on of the USB block
results in a corrupted DP_PHY register (e.g. DP_PHY_AUX_CFG8).
Add a pointer to the USB part of the PHY to the driver data and use that
to power on the PHY also if the DP part of the PHY is initialised first.
Fixes: 52e013d0bffa ("phy: qcom-qmp: Add support for DP in USB3+DP combo phy")
Cc: stable@xxxxxxxxxxxxxxx # 5.10
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20221114081346.5116-5-johan+linaro@xxxxxxxxxx
Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 40c25a0ead23..17707f68d482 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -932,6 +932,7 @@ struct qcom_qmp {
struct regulator_bulk_data *vregs;
struct qmp_phy **phys;
+ struct qmp_phy *usb_phy;
struct mutex phy_mutex;
int init_count;
@@ -1911,7 +1912,7 @@ static int qmp_combo_com_init(struct qmp_phy *qphy)
{
struct qcom_qmp *qmp = qphy->qmp;
const struct qmp_phy_cfg *cfg = qphy->cfg;
- void __iomem *pcs = qphy->pcs;
+ struct qmp_phy *usb_phy = qmp->usb_phy;
void __iomem *dp_com = qmp->dp_com;
int ret;
@@ -1963,7 +1964,8 @@ static int qmp_combo_com_init(struct qmp_phy *qphy)
qphy_clrbits(dp_com, QPHY_V3_DP_COM_SWI_CTRL, 0x03);
qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
- qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN);
+ qphy_setbits(usb_phy->pcs, usb_phy->cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
+ SW_PWRDN);
mutex_unlock(&qmp->phy_mutex);
@@ -2831,6 +2833,8 @@ static int qmp_combo_probe(struct platform_device *pdev)
goto err_node_put;
}
+ qmp->usb_phy = qmp->phys[id];
+
/*
* Register the pipe clock provided by phy.
* See function description to see details of this pipe clock.
@@ -2846,6 +2850,9 @@ static int qmp_combo_probe(struct platform_device *pdev)
id++;
}
+ if (!qmp->usb_phy)
+ return -EINVAL;
+
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
return PTR_ERR_OR_ZERO(phy_provider);
