Re: [PATCH v1] mtd: parsers: ofpart: Fix parsing when size-cells is 0

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On 12/2/22 16:49, Miquel Raynal wrote:
Hi Marek,

Hi,

On 12/2/22 16:00, Miquel Raynal wrote:
Hi Marek,

Hi,

marex@xxxxxxx wrote on Fri, 2 Dec 2022 15:31:40 +0100:
On 12/2/22 15:05, Miquel Raynal wrote:
Hi Francesco,

Hi,

[...]
I still strongly disagree with the initial proposal but what I think we
can do is:

1. To prevent future breakages:
     Fix fdt_fixup_mtdparts() in u-boot. This way newer U-Boot + any
     kernel should work.

2. To help tracking down situations like that:
     Keep the warning in ofpart.c but continue to fail.

3. To fix the current situation:
      Immediately revert commit (and prevent it from being backported):
      753395ea1e45 ("ARM: dts: imx7: Fix NAND controller size-cells")
      This way your own boot flow is fixed in the short term.

Here I disagree, the fix is correct and I think we shouldn't
proliferate incorrect DTs which don't match the binding document.

I agree we should not proliferate incorrect DTs, so let's use a modern
description then

Yes please !

, with a controller and a child node which defines the
chip.

But what if there is no chip connected to the controller node ?

If I understand the proposal here right (please correct me if I'm wrong), then:

Good idea to summarize.


1) This is the original, old, wrong binding:
&gpmi {
    #size-cells = <1>;
    ...
    partition@N { ... };
};

Yes.



2) This is the newer, but still wrong binding:
&gpmi {
    #size-cells = <0>;
    ...
    partitions {
      partition@N { ... };
    };
};

Well, this is wrong description, but it would work (for compat reasons,
even though I don't think this is considered valid DT by the schemas).


3) This is the newest binding, what we want:
&gpmi {
    #size-cells = <0>;
    ...
    nand-chip {
      partitions {
        partition@N { ... };
      };
    };
};

Yes


But if there is no physical nand chip connected to the controller, would we end up with empty nand-chip node in DT, like this?
&gpmi {
    #size-cells = <X>;
    ...
    nand-chip { /* empty */ };
};

Is this really a concern?

I don't know, maybe it is not.

If there is no NAND chip, the controller
should be disabled, no? I guess technically you could even use the
status property in the nand-chip node...

Sure.

However, it should not be empty, at the very least a reg property
should indicate on which CS it is wired, as expected there:
https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git/tree/Documentation/devicetree/bindings/mtd/nand-chip.yaml?h=mtd/next

OK, I see your point. So basically this?

&gpmi {
  #size-cells = <1>;
  ...
  nand-chip@0 {
    reg = <0>;
  };
};

btw. the GPMI NAND controller supports only one chipselect, so the reg in nand-chip node makes little sense.

But, as nand-chip.yaml references mtd.yaml, you can as well use
whatever is described here:
https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git/tree/Documentation/devicetree/bindings/mtd/mtd.yaml?h=mtd/next

What would be the gpmi controller size cells (X) in that case, still 0, right ? So how does that help solve this problem, wouldn't U-Boot still populate the partitions directly under the gpmi node or into partitions sub-node ?

The commit that was pointed in the original fix clearly stated that the
NAND chip node was targeted

I think this is another miscommunication here. The commit

753395ea1e45 ("ARM: dts: imx7: Fix NAND controller size-cells")

modifies the size-cells of the NAND controller. The nand-chip is not involved in this at all . In the examples above, it's the "&gpmi" node size-cells that is modified.

, not the NAND controller node. I hope this
is correctly supported in U-Boot though. So if there is a NAND chip
subnode, I suppose U-Boot would try to create the partitions that are
inside, or even in the sub "partitions" container.

My understanding is that U-Boot checks the nand-controller node size-cells, not the nand-chip{} or partitions{} subnode size-cells .

Francesco, can you please share the DT, including the U-Boot generated partitions, which is passed to Linux on Colibri MX7 ? I think that should make all confusion go away.

(or am I the only one who's still confused here?)



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