commit d6ffe6067a54972564552ea45d320fb98db1ac5e upstream.
Some architectures define their own arch_test_bit and they also need
arch_test_bit_acquire, otherwise they won't compile. We also clean up
the code by using the generic test_bit if that is equivalent to the
arch-specific version.
Signed-off-by: Mikulas Patocka <mpatocka@xxxxxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
Fixes: 8238b4579866 ("wait_on_bit: add an acquire memory barrier")
Signed-off-by: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
---
arch/alpha/include/asm/bitops.h | 8 +++-----
arch/arc/include/asm/bitops.h | 17 +++--------------
arch/frv/include/asm/bitops.h | 26 +++-----------------------
arch/h8300/include/asm/bitops.h | 3 ++-
arch/hexagon/include/asm/bitops.h | 15 +++++++++++++++
arch/ia64/include/asm/bitops.h | 8 +++-----
arch/m68k/include/asm/bitops.h | 7 +++----
arch/mn10300/include/asm/bitops.h | 10 +++-------
arch/s390/include/asm/bitops.h | 11 +++--------
arch/sh/include/asm/bitops-op32.h | 11 ++---------
10 files changed, 40 insertions(+), 76 deletions(-)
Index: linux-stable/arch/alpha/include/asm/bitops.h
===================================================================
--- linux-stable.orig/arch/alpha/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
+++ linux-stable/arch/alpha/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
@@ -7,6 +7,7 @@
#include <asm/compiler.h>
#include <asm/barrier.h>
+#include <asm-generic/bitops/generic-non-atomic.h>
/*
* Copyright 1994, Linus Torvalds.
@@ -282,11 +283,8 @@ __test_and_change_bit(unsigned long nr,
return (old & mask) != 0;
}
-static inline int
-test_bit(int nr, const volatile void * addr)
-{
- return (1UL & (((const int *) addr)[nr >> 5] >> (nr & 31))) != 0UL;
-}
+#define test_bit generic_test_bit
+#define test_bit_acquire generic_test_bit_acquire
/*
* ffz = Find First Zero in word. Undefined if no zero exists,
Index: linux-stable/arch/hexagon/include/asm/bitops.h
===================================================================
--- linux-stable.orig/arch/hexagon/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
+++ linux-stable/arch/hexagon/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
@@ -186,7 +186,22 @@ static inline int __test_bit(int nr, con
return retval;
}
+static inline int __test_bit_acquire(int nr, const volatile unsigned long *addr)
+{
+ int retval;
+
+ asm volatile(
+ "{P0 = tstbit(%1,%2); if (P0.new) %0 = #1; if (!P0.new) %0 = #0;}\n"
+ : "=&r" (retval)
+ : "r" (addr[BIT_WORD(nr)]), "r" (nr % BITS_PER_LONG)
+ : "p0", "memory"
+ );
+
+ return retval;
+}
+
#define test_bit(nr, addr) __test_bit(nr, addr)
+#define test_bit_acquire(nr, addr) __test_bit_acquire(nr, addr)
/*
* ffz - find first zero in word.
Index: linux-stable/arch/ia64/include/asm/bitops.h
===================================================================
--- linux-stable.orig/arch/ia64/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
+++ linux-stable/arch/ia64/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
@@ -17,6 +17,7 @@
#include <linux/types.h>
#include <asm/intrinsics.h>
#include <asm/barrier.h>
+#include <asm-generic/bitops/generic-non-atomic.h>
/**
* set_bit - Atomically set a bit in memory
@@ -330,11 +331,8 @@ __test_and_change_bit (int nr, void *add
return (old & bit) != 0;
}
-static __inline__ int
-test_bit (int nr, const volatile void *addr)
-{
- return 1 & (((const volatile __u32 *) addr)[nr >> 5] >> (nr & 31));
-}
+#define test_bit generic_test_bit
+#define test_bit_acquire generic_test_bit_acquire
/**
* ffz - find the first zero bit in a long word
Index: linux-stable/arch/m68k/include/asm/bitops.h
===================================================================
--- linux-stable.orig/arch/m68k/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
+++ linux-stable/arch/m68k/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
@@ -14,6 +14,7 @@
#include <linux/compiler.h>
#include <asm/barrier.h>
+#include <asm-generic/bitops/generic-non-atomic.h>
/*
* Bit access functions vary across the ColdFire and 68k families.
@@ -148,10 +149,8 @@ static inline void bfchg_mem_change_bit(
#define __change_bit(nr, vaddr) change_bit(nr, vaddr)
-static inline int test_bit(int nr, const unsigned long *vaddr)
-{
- return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0;
-}
+#define test_bit generic_test_bit
+#define test_bit_acquire generic_test_bit_acquire
static inline int bset_reg_test_and_set_bit(int nr,
Index: linux-stable/arch/s390/include/asm/bitops.h
===================================================================
--- linux-stable.orig/arch/s390/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
+++ linux-stable/arch/s390/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
@@ -43,6 +43,7 @@
#include <linux/typecheck.h>
#include <linux/compiler.h>
#include <asm/barrier.h>
+#include <asm-generic/bitops/generic-non-atomic.h>
#define __BITOPS_NO_BARRIER "\n"
@@ -261,14 +262,8 @@ __test_and_change_bit(unsigned long nr,
return (ch >> (nr & 7)) & 1;
}
-static inline int test_bit(unsigned long nr, const volatile unsigned long *ptr)
-{
- const volatile unsigned char *addr;
-
- addr = ((const volatile unsigned char *)ptr);
- addr += (nr ^ (BITS_PER_LONG - 8)) >> 3;
- return (*addr >> (nr & 7)) & 1;
-}
+#define test_bit generic_test_bit
+#define test_bit_acquire generic_test_bit_acquire
static inline int test_and_set_bit_lock(unsigned long nr,
volatile unsigned long *ptr)
Index: linux-stable/arch/sh/include/asm/bitops-op32.h
===================================================================
--- linux-stable.orig/arch/sh/include/asm/bitops-op32.h 2022-11-14 22:15:18.000000000 +0100
+++ linux-stable/arch/sh/include/asm/bitops-op32.h 2022-11-14 22:15:18.000000000 +0100
@@ -129,14 +129,7 @@ static inline int __test_and_change_bit(
return (old & mask) != 0;
}
-/**
- * test_bit - Determine whether a bit is set
- * @nr: bit number to test
- * @addr: Address to start counting from
- */
-static inline int test_bit(int nr, const volatile unsigned long *addr)
-{
- return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
-}
+#define test_bit generic_test_bit
+#define test_bit_acquire generic_test_bit_acquire
#endif /* __ASM_SH_BITOPS_OP32_H */
Index: linux-stable/arch/h8300/include/asm/bitops.h
===================================================================
--- linux-stable.orig/arch/h8300/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
+++ linux-stable/arch/h8300/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
@@ -88,7 +88,8 @@ static inline int test_bit(int nr, const
return ret;
}
-#define __test_bit(nr, addr) test_bit(nr, addr)
+#define __test_bit(nr, addr) test_bit(nr, addr)
+#define test_bit_acquire(nr, addr) test_bit(nr, addr)
#define H8300_GEN_TEST_BITOP(FNNAME, OP) \
static inline int FNNAME(int nr, void *addr) \
Index: linux-stable/arch/arc/include/asm/bitops.h
===================================================================
--- linux-stable.orig/arch/arc/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
+++ linux-stable/arch/arc/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
@@ -21,6 +21,7 @@
#ifndef CONFIG_ARC_HAS_LLSC
#include <asm/smp.h>
#endif
+#include <asm-generic/bitops/generic-non-atomic.h>
#ifdef CONFIG_ARC_HAS_LLSC
@@ -239,20 +240,8 @@ BIT_OPS(clear, & ~, CTOP_INST_AAND_DI_R2
BIT_OPS(change, ^, CTOP_INST_AXOR_DI_R2_R2_R3)
#endif
-/*
- * This routine doesn't need to be atomic.
- */
-static inline int
-test_bit(unsigned int nr, const volatile unsigned long *addr)
-{
- unsigned long mask;
-
- addr += nr >> 5;
-
- mask = 1UL << (nr & 0x1f);
-
- return ((mask & *addr) != 0);
-}
+#define test_bit generic_test_bit
+#define test_bit_acquire generic_test_bit_acquire
#ifdef CONFIG_ISA_ARCOMPACT
Index: linux-stable/arch/frv/include/asm/bitops.h
===================================================================
--- linux-stable.orig/arch/frv/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
+++ linux-stable/arch/frv/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
@@ -23,6 +23,7 @@
#error only <linux/bitops.h> can be included directly
#endif
+#include <asm-generic/bitops/generic-non-atomic.h>
#include <asm-generic/bitops/ffz.h>
#include <asm/atomic.h>
@@ -132,29 +133,8 @@ static inline int __test_and_change_bit(
return retval;
}
-/*
- * This routine doesn't need to be atomic.
- */
-static inline int
-__constant_test_bit(unsigned long nr, const volatile void *addr)
-{
- return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
-}
-
-static inline int __test_bit(unsigned long nr, const volatile void *addr)
-{
- int * a = (int *) addr;
- int mask;
-
- a += nr >> 5;
- mask = 1 << (nr & 0x1f);
- return ((mask & *a) != 0);
-}
-
-#define test_bit(nr,addr) \
-(__builtin_constant_p(nr) ? \
- __constant_test_bit((nr),(addr)) : \
- __test_bit((nr),(addr)))
+#define test_bit generic_test_bit
+#define test_bit_acquire generic_test_bit_acquire
#include <asm-generic/bitops/find.h>
Index: linux-stable/arch/mn10300/include/asm/bitops.h
===================================================================
--- linux-stable.orig/arch/mn10300/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
+++ linux-stable/arch/mn10300/include/asm/bitops.h 2022-11-14 22:15:18.000000000 +0100
@@ -19,6 +19,7 @@
#include <asm/cpu-regs.h>
#include <asm/barrier.h>
+#include <asm-generic/bitops/generic-non-atomic.h>
/*
* set bit
@@ -65,13 +66,8 @@ static inline void __clear_bit(unsigned
*a &= ~mask;
}
-/*
- * test bit
- */
-static inline int test_bit(unsigned long nr, const volatile void *addr)
-{
- return 1UL & (((const volatile unsigned int *) addr)[nr >> 5] >> (nr & 31));
-}
+#define test_bit generic_test_bit
+#define test_bit_acquire generic_test_bit_acquire
/*
* change bit
