On Fri, Oct 28, 2022 at 02:33:15PM -0700, Tim Harvey wrote:
> From: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
>
> 06781a5026350 Fixes the calculation of the DEVICE_BUSY_TIMEOUT register
> value from busy_timeout_cycles. busy_timeout_cycles is calculated wrong
> though: It is calculated based on the maximum page read time, but the
> timeout is also used for page write and block erase operations which
> require orders of magnitude bigger timeouts.
>
> Fix this by calculating busy_timeout_cycles from the maximum of
> tBERS_max and tPROG_max.
>
> This is for now the easiest and most obvious way to fix the driver.
> There's room for improvements though: The NAND_OP_WAITRDY_INSTR tells us
> the desired timeout for the current operation, so we could program the
> timeout dynamically for each operation instead of setting a fixed
> timeout. Also we could wire up the interrupt handler to actually detect
> and forward timeouts occurred when waiting for the chip being ready.
>
> As a sidenote I verified that the change in 06781a5026350 is really
> correct. I wired up the interrupt handler in my tree and measured the
> time between starting the operation and the timeout interrupt handler
> coming in. The time increases 41us with each step in the timeout
> register which corresponds to 4096 clock cycles with the 99MHz clock
> that I have.
>
> Fixes: 06781a5026350 ("mtd: rawnand: gpmi: Fix setting busy timeout setting")
> Fixes: b1206122069aa ("mtd: rawniand: gpmi: use core timings instead of an empirical derivation")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
> Acked-by: Han Xu <han.xu@xxxxxxx>
> Tested-by: Tomasz Moń <tomasz.mon@xxxxxxxxxxxxxxx>
> Signed-off-by: Richard Weinberger <richard@xxxxxx>
> ---
> stable-5.10
You did not sign-off on this backport. Please fix that up and resend
and also give us a hint as to what the upstream commit id is here.
thanks,
greg k-h
