On 10/26/2022 9:49 AM, Greg Kroah-Hartman wrote:
On Thu, Oct 20, 2022 at 04:01:07PM -0700, Florian Fainelli wrote:
From: James Morse <james.morse@xxxxxxx>
commit 44b3834b2eed595af07021b1c64e6f9bc396398b upstream
Cortex-A57 and Cortex-A72 have an erratum where an interrupt that
occurs between a pair of AES instructions in aarch32 mode may corrupt
the ELR. The task will subsequently produce the wrong AES result.
The AES instructions are part of the cryptographic extensions, which are
optional. User-space software will detect the support for these
instructions from the hwcaps. If the platform doesn't support these
instructions a software implementation should be used.
Remove the hwcap bits on affected parts to indicate user-space should
not use the AES instructions.
Acked-by: Ard Biesheuvel <ardb@xxxxxxxxxx>
Signed-off-by: James Morse <james.morse@xxxxxxx>
Link: https://lore.kernel.org/r/20220714161523.279570-3-james.morse@xxxxxxx
Signed-off-by: Will Deacon <will@xxxxxxxxxx>
[florian: resolved conflicts in arch/arm64/tools/cpucaps and cpu_errata.c]
Signed-off-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
Change-Id: I651a0db2e9d2f304d210ae979ae586e7dcc9744d
No need for Change-Id: in upstream patches :)
Meh, the perils of working with Gerrit in the same tree.. do you need me
to resubmit or can you strip those when you apply the patches?
--
Florian
