Re: [PATCH v2] drm/mgag200: Fix PLL setup for G200_SE_A rev >=4

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I just pushed it to drm-misc-next.

I also fixed the commit message a bit, the commit moving this line of code is in fact:

commit 877507bb954e ("drm/mgag200: Provide per-device callbacks for PIXPLLC")

Best Regards

--

Jocelyn

On 13/10/2022 15:55, Thomas Zimmermann wrote:


Am 13.10.22 um 15:28 schrieb Jocelyn Falempe:
For G200_SE_A, PLL M setting is wrong, which leads to blank screen,
or "signal out of range" on VGA display.
previous code had "m |= 0x80" which was changed to
m |= ((pixpllcn & BIT(8)) >> 1);

Tested on G200_SE_A rev 42

This line of code was moved to another file with
commit 85397f6bc4ff ("drm/mgag200: Initialize each model in separate
function") but can be easily backported before this commit.

v2: * put BIT(7) First to respect MSB-to-LSB (Thomas)
     * Add a comment to explain that this bit must be set (Thomas)

Fixes: 2dd040946ecf ("drm/mgag200: Store values (not bits) in struct mgag200_pll_values")
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Jocelyn Falempe <jfalempe@xxxxxxxxxx>

Reviewed-by: Thomas Zimmermann <tzimmermann@xxxxxxx>

---
  drivers/gpu/drm/mgag200/mgag200_g200se.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_g200se.c b/drivers/gpu/drm/mgag200/mgag200_g200se.c
index be389ed91cbd..bd6e573c9a1a 100644
--- a/drivers/gpu/drm/mgag200/mgag200_g200se.c
+++ b/drivers/gpu/drm/mgag200/mgag200_g200se.c
@@ -284,7 +284,8 @@ static void mgag200_g200se_04_pixpllc_atomic_update(struct drm_crtc *crtc,
      pixpllcp = pixpllc->p - 1;
      pixpllcs = pixpllc->s;
-    xpixpllcm = pixpllcm | ((pixpllcn & BIT(8)) >> 1);
+    // For G200SE A, BIT(7) should be set unconditionally.
+    xpixpllcm = BIT(7) | pixpllcm;
      xpixpllcn = pixpllcn;
      xpixpllcp = (pixpllcs << 3) | pixpllcp;





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