Hello Boris, On 9/23/2022 9:16 PM, Borislav Petkov wrote: > On Fri, Sep 23, 2022 at 09:08:01PM +0530, K Prateek Nayak wrote: >> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h >> index ef4775c6db01..fcd3617ed315 100644 >> --- a/arch/x86/include/asm/cpufeatures.h >> +++ b/arch/x86/include/asm/cpufeatures.h >> @@ -460,5 +460,6 @@ >> #define X86_BUG_MMIO_UNKNOWN X86_BUG(26) /* CPU is too old and its MMIO Stale Data status is unknown */ >> #define X86_BUG_RETBLEED X86_BUG(27) /* CPU is affected by RETBleed */ >> #define X86_BUG_EIBRS_PBRSB X86_BUG(28) /* EIBRS is vulnerable to Post Barrier RSB Predictions */ >> +#define X86_BUG_STPCLK X86_BUG(29) /* STPCLK# signal does not get asserted in time during IOPORT based C-state entry */ > > What for? > > Did you not see this thread? > > https://lore.kernel.org/r/78d13a19-2806-c8af-573e-7f2625edfab8@xxxxxxxxx > Yes, I did see the patch, but Andreas replied to Dave's patch attached in v1 saying that he had seen this issue with AMD Athlon on a VIA chipset back in 2006. (https://lore.kernel.org/lkml/Yyy6l94G0O2B7Yh1@xxxxxxxxxxxxxxxxxxxxxx/) Therefore, Dave's patch is not sufficient. Dave suggested the use of AMD vendor and family check, but Peter then pointed out that we would also need the Hygon vendor check. Hence I worked on the v2 which addressed these with the help of X86_BUG_STPCLK so that we can avoid vendor specific checks inside the common acpi code. -- Thanks and Regards, Prateek
